HW USART TX Level

Scanny · Joined: 13 Jan 2006 Posts: 5 Location: Italy

I guys,

I have a problem related to the idle state of tx ( RC6 ) PIN when in RX mode.

I need to drive a serial external module that requires TX Line at LOW Level when PIC is waiting for an incoming streaming.

Looking at scope and also on the Registers I found that with #RS232 directive TRIC.6 = 0 and TRISC.7 = 1.
Moreover LATC.6 = 1 and LATC.6 = 1.

I'm not able to test fw modification now but my question is really simple:

"Do you think that simple having in the code the bit_clear( LATC, 6 ) when in RX I can solve my problem ? "

"Or can you suggest a more elegant way to reach my target ?"

Some details:
PIC18F2420 @40Mhz
CCS PCH 3.242

Thank you very much for your help

Paolo

asmallri · Joined: 12 Aug 2004 Posts: 1634 Location: Perth, Australia

Driving TX TTL level low on idle is not the protocol behaviour for RS232. It sounds like the external module is expecting Rs232 line driver input level behaviour. Can you post a link to the module?
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Scanny · Joined: 13 Jan 2006 Posts: 5 Location: Italy

Module is AUREL XTR-869.
Is a radio module.

In the datasheet you'll don't find anything about the TX LOW line.
This suggestion comes directly from AUREL technicians.

Paolo

Humberto · Posted: Fri Jan 13, 2006 8:16 am

Scanny · Joined: 13 Jan 2006 Posts: 5 Location: Italy

Dear Humberto,

I need to look into INVERTED Mode. I don't know what this does mean but I can simple imagine the behaviour.

Of course I considered a simple NPN transistor + a collector resistor in order to have a logical inverter but I cannot follow this way because the hardare ( schematics plus pcbs ) are already done !

I will try your suggestion today.

I will back on the forum with results.

Thanks a lot
Paolo

Humberto · Posted: Fri Jan 13, 2006 8:35 am