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nehallove
Joined: 16 Jan 2008 Posts: 61
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Boot Block Table Read protection makes code non-functional |
Posted: Wed Aug 24, 2011 12:40 pm |
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Hi everyone,
We are using PIC18F25K20 processor. We have our code size 96% of ROM and 31% of RAM. We ask Microchip to program our CCS code. In their configuration bit setting we put Boot Block Table Read Protection Enable. After doing that our code doesn't work, if you remove that setting then it works. Microchip came back to us and asked if our code is writing in that area which we don't. Is there anyway to find out if on these locations we can not write? How we can debug the issue?
Any help will be appreciated.
nehal _________________ nehal |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Wed Aug 24, 2011 1:03 pm |
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Edit the 18F25K20.h file and comment out the line where it says #nolist,
as shown below.
Quote: | //////// Standard Header file for the PIC18F25K20 device #device PIC18F25K20
//#nolist
//////// Program memory: 16384x16 Data RAM: 1536 Stack: 31
//////// I/O: 25 Analog Pins: 13
//////// Data EEPROM: 256
//////// C Scratch area: 00 ID Location: 200000
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Compile your program and then search the .LST file for this word:
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nehallove
Joined: 16 Jan 2008 Posts: 61
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Posted: Wed Aug 24, 2011 1:19 pm |
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What we found that we have some TBLRD instructions which we use for the constants we defined. Does that affect? Does that store something on the BOOT Block Table Read Protection Area?
Thank you.
nehal _________________ nehal |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Wed Aug 24, 2011 3:06 pm |
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Are any of the TBLRD instructions attempting to read the address range
(000h-7FFh) of the Boot Block area ? |
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nehallove
Joined: 16 Jan 2008 Posts: 61
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Posted: Wed Aug 24, 2011 7:00 pm |
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which instruction i am looking at ?
.................... temp1=(float)(temp_tbl[i])*10;
257A: BCF FD8.0
257C: RLCF x26,W
257E: CLRF 03
2580: MOVFF FF2,22F
2584: BCF FF2.7
2586: MOVLB 0
2588: CALL 023C
258C: TBLRD*+
258E: MOVFF FF5,03
2592: MOVLB 2
2594: BTFSC x2F.7
2596: BSF FF2.7
2598: MOVLB 3
259A: MOVWF x7E
259C: MOVFF 03,37F
25A0: MOVLB 0
25A2: CALL 101C
25A6: MOVFF 00,230
25AA: MOVFF 01,231
25AE: MOVFF 02,232
25B2: MOVFF 03,233
25B6: MOVFF 03,39D
25BA: MOVFF 02,39C
25BE: MOVFF 01,39B
25C2: MOVFF 00,39A
25C6: MOVLB 3
25C8: CLRF xA1
25CA: CLRF xA0
25CC: MOVLW 20
25CE: MOVWF x9F
25D0: MOVLW 82
25D2: MOVWF x9E
25D4: MOVLB 0
25D6: CALL 15A4
25DA: MOVFF 03,22A
25DE: MOVFF 02,229
25E2: MOVFF 01,228
25E6: MOVFF 00,227
I can not see any instruction which clearly says the locations.
Thanks. _________________ nehal |
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FvM
Joined: 27 Aug 2008 Posts: 2337 Location: Germany
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Posted: Thu Aug 25, 2011 12:40 am |
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It can be expected, that call 023c is a constant load routine, setting TBLPTR to a succeeding memory location. In this case TBLRD*+ will fail, when table read protection is set for the boot block.
Code: | 2588: CALL 023C
258C: TBLRD*+ |
Generally, this kind of boot block protection only makes sense, if the boot block is exclusively reserved to the boot loader. Obviously this isn't the case in your application. |
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nehallove
Joined: 16 Jan 2008 Posts: 61
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Posted: Fri Aug 26, 2011 1:05 pm |
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Thank you very much for the help.
nehal _________________ nehal |
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