Re-setup of SPI cause problems

[Mortenc]

Hello clever forum,

I have found a strange thing about the SPI setup.
For safety reasons I always re-setup my TRIS and special functions on every program turnaround time. This include the SPI function.
However this gives problem for me because the re-setup of the SPI causes deactivating SPI and re-activating SPI.
Processor PIC18F4520

[FvM]

[Ttelmah]

What the line does, during the disabled period, is completely up to you. If your SPI idles high, then simply set the line high, _before_ calling setup_spi the first time. When the SPI is disabled, the value latched in the output register, is what the line goes to.
As for why the compiler does this, it has to. There are errata, on quite a lot of PICs, covering not being able to configure the MSSP while it is enabled, and even on the ones without this, changing mode with the peripheral enabled, _will_ result in spurious signals on the output lines.
The 'fully safe' way to work, is to resistively bias the clock line to it's idle state, and program the line as an input (the default on boot up). This way there will be no extra clocks, either on initial power up, or when reprogramming the peripheral.
It is 'arguable', whether this actually adds safety. In some cases changing registers inreases the probability of errors. The 'better' way, would be to add external hardware monitoring the functionality of the whole system, and if this shows a fault, trigger a complete restart (external hardware watchdog). For some high reliability applications, this is required, but reprogramming registers uneccessarily, is deprecated in such systems...
YPYMATYC

Best Wishes

[Mortenc]

Thanks Ttelmah, (you are clever)

I will take your good advice into account.
However in this project I have solved the problem by moving the re-setup to another place in the program, so I only make the re-setup after the whole package is sended. (I send 5 bytes with 1 byte each program cycle).