PIC18f priority interrupt enable bit

[PicFan]

I'm working with the PIC18F452 in a project and while monitoring the RCON register (reading at startup and displaying with a printf), I noticed that the Interrupt Priority Enable bit (IPEN) is set to '1' at powerup. The data sheet (table 3-2 on pg.27) indicates that it should be set at '0' on a power-on reset.

I'm only using one isr for serial comms but I've read in the errata that some problems are associated with using interrupt priorities and I already have enough problems without adding these on top.

1. Is setting the interrupt priority bit to '0' (disabled) required manually to avoid enabled by default?

2. Does the compiler provide an alternate means to disable interrupt priorities or is a direct register write to clear this bit the only way to do this?

Thanks in advance for your help!
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This message was ported from CCS's old forum
Original Post ID: 12445

[PicFan]

:=I'm working with the PIC18F452 in a project and while monitoring the RCON register (reading at startup and displaying with a printf), I noticed that the Interrupt Priority Enable bit (IPEN) is set to '1' at powerup. The data sheet (table 3-2 on pg.27) indicates that it should be set at '0' on a power-on reset.
:=
:=I'm only using one isr for serial comms but I've read in the errata that some problems are associated with using interrupt priorities and I already have enough problems without adding these on top.
:=
:=1. Is setting the interrupt priority bit to '0' (disabled) required manually to avoid enabled by default?
:=
:=2. Does the compiler provide an alternate means to disable interrupt priorities or is a direct register write to clear this bit the only way to do this?
:=
:=Thanks in advance for your help!


I'm using V3.130 of the PCWH compiler.

After taking a look at the asm list file, it appears that the compiler is setting the priority bit (IPEN) to '1' without being requested to do so?


.................... #zero_ram
.................... void main(){
*
53E2: NOP(FFFF)
53E4: CLRF FF8
53E6: BCF F9F.5
53E8: BSF FD0.7 <------ THIS LINE SETS PRIORITY BIT?

Or is there a built-in way to request that it doesn't set this bit to '1'?


Any help is much appreciated!
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This message was ported from CCS's old forum
Original Post ID: 12446

[Woody]

I believe this was changed in PCWH version 3.137 ??? of the compiler when the FAST compiler directive was introduced.
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This message was ported from CCS's old forum
Original Post ID: 12454

[PicFan]

:=I believe this was changed in PCWH version 3.137 ??? of the compiler when the FAST compiler directive was introduced.


Thanks for the info, seems to do the trick...

regards,
PicFan
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This message was ported from CCS's old forum
Original Post ID: 12460

[Trampas]

Be careful I thing the 18F8720 has a silicon bug with the GIE bit, it is not documented or acknologed by Microchip yet...

Trampas


:=:=I believe this was changed in PCWH version 3.137 ??? of the compiler when the FAST compiler directive was introduced.
:=
:=
:=Thanks for the info, seems to do the trick...
:=
:=regards,
:=PicFan
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This message was ported from CCS's old forum
Original Post ID: 12466