Crystal Oscillator peak-peak voltage

[kbruin79]

Hello,
I am using Pic12f1840 with a 4MHZ external crystal oscillator ( ABLSG-4.000MHZ-D-2-Y-T) with a 22pF load caps. I am getting 1.2v peak-peak voltage.
2 questions:

Is the peak-peak voltage normal? shouldn't it be close to Vdd=5v?
How do I know if the oscillator is running close to it's maximum accuracy?

I have looked at the oscillator waveform and it looked clean and exactly
4MHZ is that a good indication of the oscillator correct and accurate operation? or are there something else I should be checking?

Here is my oscillator settings:

[Ttelmah]

The first thing is as soon as you put a scope on to test, the frequency _will_ shift. Not a lot, but a detectable amount. You need to be testing the OSC2 pin. This is the output from the PIC, while OSC1 is the input from the crystal, but even on this expect several PPM shift.
If you are using the OSC1 pin then the signal will degrade a lot.
The best way to measure the actual frequency is to use something that develops a signal from the oscillator, so the PWM for example, and measure this with a calibrated instrument.
No the waveform won't be anywhere near the supply voltage. The OSC1 pin detects high as 0.7Vdd, and low as 0.3Vdd (in HS mode). So should be about 2v. It's a transistor oscillator, not a 'logic' circuit.
Your crystal will have slightly too little load capacitance, unless your track layout is particularly bad.
The crystal sees as it's load, the total capacitance (pin, plus track, plus external capacitor), on one pin _paralleled_ with the capacitance on the other pin.
Now typically the pin capacitance is about 3.5pF (depends on the chip package). Normally a reasonable track layout will give perhaps 4.5 to 5pF on each leg. So with 22pF capacitors, the crystal will see:

3.5+4.5+22 = 30pF paralleled with the same on the other pin.

(30pF+30pF)/2 = 15pF seen by the crystal.

Your crystal wants 18pF. So 'not bad', but a little low.

This is why things like ground planes need to be kept away from the crystal pins (these will cause the track capacitances to soar), and particularly also why running logic tracks across the crystal tracks must be avoided (with the low capacitances involved, and sensitive inputs, these can easily result in extra clocks being seen...).

Get the Microchip application note about crystal choice, capacitor selection, and track layout.

[kbruin79]