[SOLVED] Receive problems with MRF24J40MA module

[arunb]

Hi,

I am working on the MRf24J40MA module, I have managed to send and receive a few packets using two identical MRf24J40MA modules connected to 2 18F2620 mcus.

To receive packets I use the INT pin of the module connected to B0 of the mcu, though I can detect packets (INT line goes low), I get wrong data while reading the RXFIFO buffer. But sometimes packets are read correctly.

Can anyone advise why this occurs ???

Also as the mcu runs on +5 V , I use a 10K and 15K resistor divider to get 3 V for the output ports to the MRF module, the SDO and the INT pins are connected to B0 and B1 pins of the 18f2620 mcu.

The datasheet mentions these pins as TTL buffers, and can detect a high of at least 2.5 Volts.

Is my inference correct ??, or do I have to use a transistor stage to get a +5V high ??

thanks
a

[asmboy]

You could have several problems -but what comes to mind is
not having proper 5v 3.3v translation.

How are you level matching your SPI lines ??

[PCM programmer]

[arunb]

Sorry for the delay in replying..

I have actually managed to solve the problem, it seems the erratic receive operation was because the interrupts were not being cleared just after initialising the MRF module. Once I did this, the system started to work flawlessly.

[asmboy]

"
glad you got it !!
but i'd like to add to those who read this thread -

re: 10K and 15K resistor"

you can get better level translation ( more frequency span)
if you try more divider current / lowwer'Z' by using

2k and 3K as your resistors -

if the frequencies involved are high enough - stray capacitance in parallel with the 15k resistor can provide extra un- intended attenuation.

IMB all passive 3.3/5V translation- especially at significant ( over 500 khz) clock speed -is a bit dodgey

[arunb]

Thanks again, I will change that to 2K and 3K resistors.

I was using the 74VHC08 for level translation, but the IC became unavailable for a long time, so I had to change to resistances.

thanks
a