kunzem
Joined: 12 Jul 2013 Posts: 3
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PIC16LF1509 CLC3/4 responding [solved] |
Posted: Fri Jul 12, 2013 5:53 am |
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Hello, I'm trying to work with the CLC's of the PIC, the cells 1 and 2 are working fine and as expected, but 3 and 4 are not responding in any way.
compiler is: CCS PCM C Compiler, Version 5.007, 10594
I'm using following test code that is an and/or with high on all ins and should give also an high output:
Code: |
clc2_setup_input(1,CLC_INPUT_3);
clc2_setup_input(2,CLC_INPUT_0);
clc2_setup_input(3,CLC_INPUT_7);
clc2_setup_input(4,CLC_INPUT_7);
clc2_setup_gate(1,CLC_GATE_SET);
clc2_setup_gate(2,CLC_GATE_SET);
clc2_setup_gate(3,CLC_GATE_SET);
clc2_setup_gate(4,CLC_GATE_SET);
setup_clc2(CLC_ENABLED | CLC_MODE_AND_OR);
clc3_setup_input(1,CLC_INPUT_3);
clc3_setup_input(2,CLC_INPUT_0);
clc3_setup_input(3,CLC_INPUT_7);
clc3_setup_input(4,CLC_INPUT_7);
clc3_setup_gate(1,CLC_GATE_SET);
clc3_setup_gate(2,CLC_GATE_SET);
clc3_setup_gate(3,CLC_GATE_SET);
clc3_setup_gate(4,CLC_GATE_SET);
setup_clc3(CLC_ENABLED | CLC_MODE_AND_OR); |
1 and 4 are configured exactly the same way.
and for check this one:
Code: | while (1) {
l1 = LC1OUT;
l2 = LC2OUT;
l3 = LC3OUT;
l4 = LC4OUT;
printf("%u %u %u %u \n",l1,l2,l3,l4);
delay_ms(50); |
this only works as expected for CLC1 and 2:
Code: |
1 1 0 0
1 1 0 0
1 1 0 0
1 1 0 0
1 1 0 0
1 1 0 0
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i already crawled the web, docs and also the generated assembly... cant find any reason why they play dead duck... (oh also changed the chip 2 times)
also does anyone have an idea how to transform a 22khz signal to a steady one with one logic cell? i got a 22khz single pulse signal on pwm for that purpose but its not synced to the input signal, so the approach is this:
clc1 is setting flip flop on high signal of the input and resetting on pwm pulse, clc2 is just a d-flipflop that latches on pwm signal, this gives an steady information if 22khz is on or off (diseqc decoding)
Last edited by kunzem on Fri Jul 12, 2013 9:10 am; edited 1 time in total |
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