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MAXQ3181 - cant read voltage, current, temperature correctly

 
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meloun



Joined: 15 Oct 2010
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MAXQ3181 - cant read voltage, current, temperature correctly
PostPosted: Fri Oct 15, 2010 1:35 am     Reply with quote

My SPI communication seems to work perfectly,
chip returns ackknowledges(0xc1, 0xc2), I am able to read STATUS(0x00), all three MODES(0x00), IRQ_FLAG(0x00) and other registers.

But when I am trying to read A.VRMS or B.VRMS or C.VRMS registers, then I'll receive
confused values (0x0, 0xC800, 0x1220091). And also when I'm
changing the input voltage, the values read from these registers
are still the same. I am even not able to read RAWTEMP register correctly (temperature from internal sensor),
so I suppose my problem doesn't depend on wiring diagram or connecting the phases.

I also use just the 8MHz oscillator and 2x15pF capacitors.

Here is my pseudocode.

http://pastebin.com/p2bLWNJn


Last edited by meloun on Sun Oct 17, 2010 3:02 pm; edited 1 time in total
PCM programmer



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PostPosted: Fri Oct 15, 2010 11:58 am     Reply with quote

MAX3181 is just an RS-232 receiver. It's a level-shifter.
It has no SPI interface.
http://datasheets.maxim-ic.com/en/ds/MAX3180-MAX3183.pdf
Fandango



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PostPosted: Fri Oct 15, 2010 1:08 pm     Reply with quote

Hi,

I saw your pseudo-code, but I have some basic doubts regarding some issues that I would like to discuss with you first.

Reading the datasheet, and besides you said your SPI is ok, I did verify the following:

- SPI clock rate must be less than or equal to 8MHz/4 (so 2MHz), but if running in low power mode or if the crystal is still warming up, the SPI clock frequency must remain at 250kHz or less for proper operation. I am using 72kHz all the time, at least for now regarding testing. What is your SPI frequency?

- The master must also include a communication delay (minimum 50us) following each byte (tx or rx). For frequencies less than 1MHz, increase by a factor of 8 (so 400us minimum). My doubt is: is it necessary to put a delay between a transmission and a reception too? I mean, in your pseudo-code (for example like follow) there is no delay between sending and the first comparing, so the 50ms delay will always be executed. Ok, this is an approach, but what do you thing regarding a finite state machine instead? I think it could be more effective and more easy to debug.
Code:
  ////SEND 2.BYTE - LSB portion of address
  aux_data = spi_send(0x1C);
   
  if(aux_data == 0xC2){ //maxim ready?

    //WAIT FOR DATA             
    delay_ms(50);


- Since SPI is a full-duplex interface, the master and slave must both transmit the same number of bytes during the command. When a multiple-byte register is read or written (2/4/8 byte length), the least significant byte is read or written first in the command.

Ok, seeing your pseudo-code I did understand the following:
- Is a read operation, because you send 0x28 as first byte. I mean:
0x28 = 0011.1000
--> Bits 7 and 6 are both 0, so = Read
--> Bits 5 and 4 are both 1, so is an 8 bytes data length
--> Bits 3 to 0 are the first byte of address, so is a Virtual Register (0x8..)
- The next byte sent is 0x1C, so the address is 0x81C.

Some considerations here:
1. Is a read operation with 8 bytes data length, but you code shows only the reading of 2 bytes of data. Also, your first comment talking about 4 bytes. Am I wrong?
2. I didn't find any register with this address (0x81C) Shocked. Who is the register you want to read (it meaning)?

- Regarding point 1, the datasheet says that "If the master sends fewer bytes than are required by the current command, the MAXQ3181 waits for SPI timeout, then drops the transaction and resets the communication channel." I think must be the same with MAXQ3180. However I think that is ok, no problem here if this happen regarding MAXQ timeout.

- Regarding point 2, the more used virtual registers of the MAXQ3181 are:
Code:
#define AFE_VA          0x831     // RMS Voltage - Phase A
#define AFE_VB          0x832     // RMS Voltage - Phase B
#define AFE_VC          0x834     // RMS Voltage - Phase C
#define AFE_IA          0x841     // RMS Current - Phase A
#define AFE_IB          0x842     // RMS Current - Phase B
#define AFE_IC          0x844     // RMS Current - Phase C
#define AFE_IN          0x840     // RMS Current - Neutral
#define AFE_PF          0x867     // Power Factor - Total


Finally, if you prefer, we can talk through e-mail instead PMs. My e-mail address is daniel.liontec_AT_hotmail.com. I also use Skype (my nick is liontec). I think could be more effective.

Best regards.
meloun



Joined: 15 Oct 2010
Posts: 2
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PostPosted: Tue Oct 19, 2010 2:05 am     Reply with quote

1/ SPI clock - we use ATMEL MCU with 11.0952MHz crystal and for SPI interface I am using prescaler 64, so 11,0592MHz/64 = 172,800 kHz. Also measured by scope. (CLK signal)
2/ Delay - before any reading, there is delay at least 15ms, it is more than it should be.
3/ Pseudocode -
    a/ dataleght - 0x28 => 0010.1000 (not 0011.1000 as you wrote) => 00 -> read, 10 -> 4 bytes(sorry about wrong comments), 1000 -> first portion of address, 0x08[/code]
    b/ address - first portion - 0x08, second portion - 0x1C => 0x81C
    I want to read A.VRMS and for that I've found this address.
    See datasheet page 24


any Idea?
biozen



Joined: 08 Sep 2010
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PostPosted: Tue Oct 19, 2010 4:12 am     Reply with quote

meloun wrote:
1/ SPI clock - we use ATMEL MCU

Are you using the CCS PIC compiler with Atmel? Are you able to get things moving on the Atmel with a CCS compiled program?!


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