SPI with 18F8722

[mkr]

Hello All :)
I am going through a very hard time to setup MAX3110 with 18F8722 in SPI mode. I am using the second spi D4,D5,D6 pins.

I am not able to write and read the configuration data from max3110. When I write 0xc40a I should read back 0x4000.
When I read 0x4000 I should read back the current setting in the SSP2BUF. I am not able to. My f8722 is in master mode

Here are my init setup of ssp2.

[list=]
//These for a 18F chip
#define CS_LOW output_low(PIN_J1)
#define CS_HIGH output_high(PIN_J1)

#byte SSP2CON = 0xF63
#byte SSP2STAT = 0xF64
#byte I2C2BUF = 0xF65
#byte SSP2BUF = 0xF66
#define SSP2C_INIT 0x00
#bit SSP2EN = 0xF63.5
#define SSP2S_INIT 0x40
#bit BF = SSP2STAT.0
#bit SMP = SSP2STAT.7
#bit CKE = SSP2STAT.6
#bit CKP = SSP2CON.4
#bit SSPM3 = SSP2CON.3
#bit SSPM2 = SSP2CON.2
#bit SSPM1 = SSP2CON.1
#bit SSPM0 = SSP2CON.0

#define READ_SSP() (SSP2BUF)
#define WAIT_FOR_SSP() while(!BF)
#define WRITE_SSP(x) SSP2BUF = (x)
#define CLEAR_WCOL() SSP2CON = SSP2CON & 0x3F

void max3110_init(void){

SSP2BUF = 0x0000;
SSP2EN = 1;
SMP = 1;
CKE = 0;
CKP = 0;
SSPM3 = 0;
SSPM2 = 0;
SSPM1 = 0;
SSPM0 = 1;

}

// this is where i read and write operation to max3110

void max3110(void){

// Mconfig = 0xC40a;

CS_LOW;
WRITE_SSP(0xc4); // send msb
WAIT_FOR_SSP();
msb=READ_SSP();

WRITE_SSP(0x0a); // send lsb
WAIT_FOR_SSP();
lsb=READ_SSP();
CS_HIGH;

readconfig = ((unsigned short)msb << 8 | lsb);

delay_us(10);

CS_LOW;
WRITE_SSP(0x40); // send msb
WAIT_FOR_SSP();
msb=READ_SSP();

WRITE_SSP(0x00); // send lsb
WAIT_FOR_SSP();
lsb=READ_SSP();
CS_HIGH;

}

Is there any thing I am missing.

PLease help me
_________________
Thanks

mkr

[Ttelmah]

One obvious thought. How have you got TRIS configured?. Remember if you are taking control of the SPI yourself, _you_ need to set the TRIS register toput the bits into the right mode. Check the chip data sheet for the required direction setting for the bits.

Best Wishes

[mkr]

the tris_d is set accordingly. D4 is SDO, D5 is SDI, D6 is SCK so thats works out to be 0x20 for port D so that is set_tris_d(0x20)
The other thing i noticed is that the clock is not coming out of D6 pin. wondering why. any thoughts
_________________
Thanks

mkr

[ckielstra]

You shouldn't poll the BF flag:

[mkr]

Thanks for your resource full reply. I looked at the f8722 errata. Your right. I should not poll for BF to change state.

Another thing about CKP and CKE. Based on MAX3110E data sheet, legal value for CKP =0 and CKE = 0. Is CPOL and CPHA same as CKP and CKE. I am getting confused. In the data sheet of MAX3110, CPOL =0 and CPHA=0 has to be set.

Your suggestion greatly appreciated
_________________
Thanks

mkr

[ckielstra]

I can recommend you to read http://www.ucpros.com/work%20samples/Microcontroller%20Communication%20Interfaces%202.htm. This is a short article on several microcontroller Interfaces including SPI.

CPOL = Clock Polarity, it defines the clock's logic level in idle state. Working is identical to the Microchip CKP bit.

CPHA = Clock Phase, it defines on which clock edge the data is shifted out for sending and shifted in for reading. The Microchip CKE bit has the same functionality but... it is defined inverted, so CKE = ! CPHA.
See also http://www.ccsinfo.com/forum/viewtopic.php?t=8747

CPOL =0, CPHA = 0 translates to --> CKP = 0, CKE =1
SMP is always set to 0, only for some very rare non-standard communications it has to be set to 1.

[mkr]

Thanks a lot. I changed the CKE =1 and CKP =0 and also followed the errata for F8722 for BF on SSP2STAT.0. I am not polling this bit.[/quote]
_________________
Thanks

mkr