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Mark Weir
Joined: 11 Sep 2003
Posts: 51
Location: New Zealand
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| 18F4620 and AN3 |
 Posted: Tue Apr 29, 2008 6:50 pm |
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Hi ALl,
I have been attempting to complete a design using AN0,1,2 and 3.
I have the following setup:
| Code: |
setup_adc_ports(AN0_TO_AN3|VSS_VDD);//AN0
setup_adc(ADC_CLOCK_DIV_32);
setup_comparator (NC_NC_NC_NC);
setup_vref (FALSE);
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I am getting results from AN3 that look like the pin is set as a reference for the comparator. With nothing connected to the pin I read 4.8 volts on the AtoD.
Perhaps I have overlooked something in the setup or maybe someone has had a similar problem. I am using version 4.071 of the compiler.
Cheers
Mark
_________________
Life is too short to avoid asking questions |
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Matro
Guest
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| Posted: Wed Apr 30, 2008 9:15 am |
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The setup_adc() should indicates an acquisition time.
For instance, for an acquisition time of 2.4µs :
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setup_adc_ports(AN0_TO_AN3|VSS_VDD);
setup_adc(ADC_CLOCK_DIV_32|ADC_TAD_MUL_12);
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Matro |
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Ttelmah
Guest
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| Posted: Wed Apr 30, 2008 9:34 am |
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RA3, doesn't connect to the comparator Vref. RA2 does. If RA3 is high, check that the TRIS is set to 1 on this pin, and look carefully at your external wiring. If it is RA2, then check that the CVROE bit, is being cleared, by the setup Vref, and not just the Vref being disabled. So, just read it:
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#byte CVRCON=0xFB5
#bit CVROE=CVRCON.6
if (CVROE==1) printf("This is the problem");
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Or something similar, after disabling the Vref.
Best Wishes |
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