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prondeau
Joined: 26 Mar 2008
Posts: 11
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| 18f45j10 usart RX corruption |
 Posted: Wed Mar 26, 2008 8:54 am |
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Hello,
I've been using an 18f45j10 for a project. I noticed that occasionally some of the characters I send to it are corrupt when received. I checked my connections and everything looked good so I checked the chip errata. There is a note in the errata:
| Quote: | In asynchronous duplex communication, the
reception can get corrupted if any bit of the TXSTA
register is modified during a reception.
Work around
The CSRC (TXSTA<7>) bit should not be set.
Though this is a “don’t care” bit in Asynchronous
mode, make sure that this bit is not set.
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I checked the disassembly listing and found that TXSTA (0xFAC) bit 7 is set:
| Code: | 2C6E 0EA6 MOVLW 0xa6
2C70 6EAC MOVWF 0xfac, ACCESS
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In lieu of a fix, what is the cleanest way to override what appears to be the default PCH behavior (just downloaded 4.069 and found the same result) so that I can continue my testing?
Thanks!
Pete Rondeau |
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Ttelmah
Guest
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| Posted: Wed Mar 26, 2008 9:22 am |
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Just clear the bit.
#bit CSRC=0xFAC.7
Before using the UART (after the initialisation), add:
CSRC=0;
Best Wishes |
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prondeau
Joined: 26 Mar 2008
Posts: 11
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| Posted: Wed Mar 26, 2008 9:54 am |
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I was concerned that if I cleared the bit manually, when the code compiled that I wouldn't be able to guarantee that the clear bit code would end up after the initialization code.
I should probably have not over-thought it so much and just tried it.
Thanks for the suggestion- now to see if it clears up the corruption problem.
Pete |
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