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Mvedovetto
Joined: 17 Aug 2007 Posts: 28
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16F913 SSP_INTERRUPT |
Posted: Sat Feb 09, 2008 8:32 am |
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Hi All!
I've a problem with PCM CCS Compiler v. 4.057:
Instruction ENABLE_INTERRUPTS(INT_SSP) doesn't set PIE1<SSPIE>. Neither inserting #asm ASIS clause:
Program
Code: |
void ENABLE_SSP_INT()
{
#asm ASIS
bcf 0x03,0x05
bsf 0x03,0x06 //seleziona pagina1
bsf PIE1,3
#endasm
}
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Disassembly listing:
Code: |
1493: void ENABLE_SSP_INT()
1494: {
1495:
1496: #asm ASIS
1497: bcf 0x03,0x05
193 1283 BCF 0x3, 0x5
1498: bsf 0x03,0x06 //seleziona pagina1
194 1703 BSF 0x3, 0x6
1499: bsf PIE1,3
195 158C BSF 0xC, 0x3
1500: #endasm
1501: }
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So CCS Compiler insert 0xC instead of 0x8C (address of PIE1).
Executing simulation or Debug with MPLAB IDE (V. 8.00), PIE1<SSPIE> is clear.
Did someone experienced with this problem. Is there a solution?
Thank you in advance for replies.
Marco |
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Ttelmah Guest
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Posted: Sat Feb 09, 2008 10:14 am |
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0C, is _correct_.....
Read up on how the PIC instructions work.
On the 16 chips, you cannot directly address location '8C', for the standard instructions (these have a _7bit_ address range). Instead, you have to set the bit in the bank select register, to say that you want '80' added to the address to be used, and then access 0C.
If you just got rid of the 'asis' instruction, and did:
Code: |
#asm
bsf PIE1,3
#endasm
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This will correctly be translated by the compiler, to:
Code: |
bsf PIE1,3
BSF 0xC, 0x3
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The compile will already be correctly accessing the right bit in the PIE. It _knows_ that you can only use a 7bit address, and does the required bank switching.
You cannot use an address above 7F, in these instructions. Hence '8C', will never appear as the target in the instruction.
Your problem is with something else.
Best Wishes |
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Mvedovetto
Joined: 17 Aug 2007 Posts: 28
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Posted: Sat Feb 09, 2008 11:13 am |
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Ttelmah wrote: | 0C, is _correct_.....
Your problem is with something else.
Best Wishes
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Thank you for reply Ttelmah: I understand about register access. So the problem could be MPLAB that does not generate a proper machine code to manage correctly PIE1 register: in fact the problem is that no SSP interrupt is generated because of PIE1 <SSPIE> is clear. If I set PIE1 <SSPIE> directly by register (MPLAB Watch Window) the program runs correctly.
I think I'll ask Microchip...
Have a good we
Marco |
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Mvedovetto
Joined: 17 Aug 2007 Posts: 28
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Posted: Sun Feb 10, 2008 5:19 am |
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I found out the problem: I selected bank #2 instead of bank #1 in #asm ASIS code. The correct code is:
Code: |
#asm ASIS
bsf 0x03,0x05
bcf 0x03,0x06 //select bank1
bsf PIE1,3
#endasm
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But with this version of compiler (PCM V. 4.057) the instruction ENABLE_INTERRUPTS(SSP_INT) seems not to work with PIC16F913. Hope this bug will be fixed in further releases.
Bye
Marco |
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