spi_write: dont understand asm code thats generated

mbarrett · Joined: 19 Sep 2003 Posts: 8

I have been having lots of trouble with spi bus and a 18f4685 (CCS v4.064)
Occasionally the chip sends the wrong data down the spi bus (have checked with a bus analyser). At the moment I am sending 3 bytes
spi_cmd_add=0b00110111;
spi_high=0b11110000;
spi_low=0b00000000;
and then calling
spi_write(spi_cmd_add);
spi_write(spi_high);
spi_write(spi_low);
on the SPI bus line coming out of the PIC I occansionaly see
00110111 10000000 00000000
instead of the correct values. As this is driving a D/A (LTC2620) you can image the problems this is causing!

I thought I would look at the code that the Complier has created and this is whats there

PCM programmer · Joined: 06 Sep 2003 Posts: 21708

Rotate Right the LSB into CY flag. Then branch on CY flag.

Post your setup_spi() statement.

mbarrett · Joined: 19 Sep 2003 Posts: 8

Obvious! thanks.
BTW I have found my problem. The setup is
SPPCON1 00100010
SPPCON2 00000000
I am feeding a pulse (ttl) into RA4 which is the pin next to RA5 which is the notSS pin. If I stop the pulse on RA4 problem stops, start the pulse problem comes back again. If I take RA5 which I am not using, high then problem stops and everything works fine. RA5 is the notSS enable pin although (I think, not sure of anything any more..) I am in master mode so this pin should not have any affect on the SPI but it does. Unless there is some other bit that needs setting that I have missed?
regards
mike

Ttelmah · Guest

I'd be inclined to suspect you may have found a silicon bug. There have been a _lot_ in the past with most 18F chips and the MSSP. The 4685, does not have any listed (yet), but this can easily be because they have not been spotted so far... :-(
It is quite interesting to look at the logic diagram for this line, which shows it just gating the SDO line. More reading, says that it should only be enabled by the bit pattern 0100, in the bottom bits of SSPCON1, but...
Have you got this pin left open circuit, but setup as an input?. If so, then it is common for this type of interraction to occur. Unused pins, should always be programmed as outputs, or pulled to one rail. Sometimes parts of the circuit that are disabled, can still partially function, if a floating pin induces spikes slightly outside the supply range. This might be what you are seeing.

Best Wishes