Two Non-Standard SPI Devices on Same SPI Bus

jecottrell · Joined: 16 Jan 2005 Posts: 559 Location: Tucson, AZ

Hello All,

I've got a TC77 that I'm using the following code to drive:

cmdrdan · Joined: 08 Apr 2005 Posts: 25 Location: Washington

Hello John --

First let me say that I've never used either of the devices you mentioned, but looking at the Toshiba datasheet you referenced indicates that you want to keep the LATCH pins low until you've written all 16 * 30 bits, then pulse the LATCH pins high for at least 50 nanoseconds, then bring them low again.

The 'leveled latch circuit' means that the outputs will 'follow' whatever you're clocking through the device as long as the LATCH pin is high, so that is why you need to keep it low, and only bring it high and then low once you've clocked all of your data through. This should keep your LEDs from flashing in the meantime...

Refer to page 2 block diagram, and see that the ST inputs to the latches don't have a caret (>) next to them, while the CK inputs do -- the caret means that the input is edge-sensitive instead of level-sensitive.

Hope this helps you; I haven't looked at the TC77 datasheet to see how they might interact.

Dan

Kenny · Joined: 07 Sep 2003 Posts: 173 Location: Australia

It looks to me that the TC77 does have a true chip select and that
the TD62726 does not. It means that as you say, the data to or from
the TC77 will be clocked into the registers of the TD62726 regardless
of the state of LATCH. This shouldn't matter, the state of the leds won't
change until LATCH is brought high then low after a write, and the
registers will be 'flushed' next time data is written.

I think that 'leveled latch circuit' means that LATCH is
level-triggered instead of edge-triggered; the document has many
such translation problems.

If speed is required so that other processes can be serviced, a pic with
the SPI hardware could be used.

jecottrell · Joined: 16 Jan 2005 Posts: 559 Location: Tucson, AZ

Thanks Guys,

That was exactly what I needed. I ended up with some bunged up code after a bunch of debugging. I took your suggestions and followed the Toshiba datasheet and it works fine.

I ended up having to bit-bang the Toshiba part because after I setup_spi for the Toshiba the TC77 quits working. I assume that has something to do with the way the pins are configured when you call setup_spi? Is there a way I can 'un-do' the setup_spi call when I need to read the TC77? I would guess I just need to set the pins that the TC77 uses to the proper directions... no? Or is there a simple, one-step solution?

Thanks again,

John

Kenny · Joined: 07 Sep 2003 Posts: 173 Location: Australia

What SPI mode did you use? Mode 0 should work for both. The data
sheet for the TB62726 shows that the clock should be normally low
and data is sampled on the rising edge of the clock.
It looks like either Mode 0 or Mode 3 might work for the TC77.

If it turns out that they need separate spi modes, you could try setting
the mode in the code for each just before using it.

I like to use ckielstra's handy SPI definitions:
#define SPI_MODE_0_0 (SPI_L_TO_H | SPI_XMIT_L_TO_H)
#define SPI_MODE_0_1 (SPI_L_TO_H)
#define SPI_MODE_1_0 (SPI_H_TO_L)
#define SPI_MODE_1_1 (SPI_H_TO_L | SPI_XMIT_L_TO_H)

eg. for the TC77
setup_spi(SPI_MASTER | SPI_MODE_1_1 | SPI_CLK_DIV_4);

Read the two temperature bytes, then deselect it.
Note: can't write to TC77 with hardware spi; pic SDI pin is
for input only. If required to write the config. , would need to do this
in bit banging mode.

setup_spi(SPI_MASTER | SPI_MODE_0_0 | SPI_CLK_DIV_4);

Send the data to the TB62726

jecottrell · Joined: 16 Jan 2005 Posts: 559 Location: Tucson, AZ

Kenny,

No, I think the problem was caused by me when I layed out the board and didn't fully understand the TC77. I fed the TC77 data pin to the MOSI on the PIC hardware SPI. So I'm forced to bit bang the TC77. It's the swap from TC77 to Toshiba, hardware to software SPI that causes problems. I think, like I said, the issue is probably with swapping the MOSI pin from output to input to read the TC77?

I'd like to learn more about what setup_spi does. I haven't looked at the LST file... not that I'd know what I was looking at. But that would probably tell me more?

Thanks,

John

Kenny · Joined: 07 Sep 2003 Posts: 173 Location: Australia

Oh dear, that complicates matters. I think you need to disable the
hardware spi before doing the bit banging for the TC77.
Either setup_spi(FALSE), or clear the SSPEN bit in SSPCON.

Re understanding setup_spi, I agree that it's difficult sometimes to
get an understanding just by looking at the list file. The hardware
description in the data sheet is the key to understanding.
The spi hardware is described in the Synchronous Serial Port (MSSP) module section.

HTH