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Defining I2C slave address |
Posted: Sat Jan 20, 2007 3:17 pm |
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I am using a PIC18F2520 device as a slave in an I2C interface. I plan to change the address of the slave on the fly. Basically toggle the value of the SSPADD register between 2 address. I was realizing that even though I change the value of the SSPADD regester in the main method, it does not change the value from the address I set while I defined the slave :
#use i2c(SLAVE, SDA=PIN_C4, SCL=PIN_C3,FORCE_HW, ADDRESS=0x5C)
Any idea what I should put ADDRESS =(),
So I can cause it to change by changing the value if the SSPADD register in the main method.
I have SSPADD loacted at :
#byte SSPADD = 0xFC8
Thanks |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Sun Jan 21, 2007 12:40 am |
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The compiler inserts code at the start of main() to initialize the SSPADD
register to 0x5C. If you change SSPADD later on in the program, then
it will take on the new value. The previous value of 0x5C doesn't
affect it anymore.
Here's part of the .LST file that shows the start-up code. This was
compiled with PCH vs. 3.249. The initialization of SSPADD is shown
in bold.
Quote: | .................... void main()
.................... {
0004: CLRF FF8
0006: BCF FD0.7
0008: CLRF FEA
000A: CLRF FE9
000C: BSF F94.3
000E: BSF F94.4
0010: MOVLW 5C
0012: MOVWF FC8
0014: MOVLW 36
0016: MOVWF FC6
0018: MOVF FC1,W
001A: ANDLW C0
001C: IORLW 0F
001E: MOVWF FC1
0020: MOVLW 07
0022: MOVWF FB4 |
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Guest
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Posted: Sun Jan 21, 2007 12:52 pm |
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Thank you for the suggestion. It really helped.
I have an issue. I have a master sending its first byte with the R/W bit set to 0. In other words, it’s going to write again. I need it to wait till I can read that address, before it sends the next byte. By the time I get to read the first byte sent by the master I end up reading the second byte sent by it due to the R/W bit set to 0 in the first byte. I tried setting the BF bit. But it didn’t help buy me any time. |
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Guest
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Posted: Sun Jan 21, 2007 2:17 pm |
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I am writing code for a slave. I am trying to implement clock stretching in Receive mode.
For clock stretching how do I set the BF bit on the falling edge of the ninth clock???
Any suggestions will be appreciated. |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Sun Jan 21, 2007 2:26 pm |
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The 18F2520 has a section on clock stretching in a Slave. You enable
it by setting the SEN bit in SSPCON2.
Here is the title of the data sheet section:
Quote: | 17.4.4 CLOCK STRETCHING |
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Guest
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Posted: Sun Jan 21, 2007 3:06 pm |
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I did try that.
Does clock stretching mean the following:
I have a situation when a master sends the first byte with the R/W=0. I need to process some code, till I can get into the I2C interrupt.
I have an infinite loop. In the beginning of the infinite loop I enable clock stretching and disable all the ISRs.
Then at the bottom of the loop enable all the interrupts and enable the interrupt on the start bit from the Master, since the ACK was not released by the slave due to clock stretching.
#byte SSP1CON1 = 0xFC6
#bit SSP1CON1_SSPM3 = SSP1CON1.3 //SSP mode control bit3
enable_interrupts(INT_SSP); //interrupts enabled on the usual SSP events (like byte arrived/sent)
SSP1CON1_SSPM3 = 1; //interrupts enabled also on starts, stops
enable_interrupts(GLOBAL);
Now after I enter the ISR. I read the SSPBUF.
I am expecting to be able to read the First Byte the master sent with the R/W=0. IS THAT TRUE???
And now I disable the clock stretching, which means that the slave outputs an ACK. letting the Master write the next byte to the slave. IS THAT TRUE??
My code :
SSP1CON1_SSPM3 = 1;
Does that set the interrupt flag on start I2C command from the MASTER.
And does it set the interrupt flag on the stop I2C command from the master as well. What’s the point of it making you enter the interrupt with the MASTER sending a stop I2C command.
I would really appreciate the correct understanding of this.
Thank you. |
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