CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to CCS Technical Support

PIC speed fundamentals

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
theteaman



Joined: 04 Aug 2006
Posts: 98

View user's profile Send private message

PIC speed fundamentals
PostPosted: Tue Aug 15, 2006 11:24 pm     Reply with quote

Hello

In this forum I see a lot of references to usecs (I assume microseconds) and clocks and oscillators etc

What I want to be able to do is calculate how long, say, an SPI operation will take. I want to know the significance of 'usecs' and the relation with a 20MHz crystal oscillator etc.. Yes I know these things are probably in the datasheet but I don't even know where to begin looking. I think this is fundamental knowledge that I'm missing. Can someone explain it to me, or point me to a web reference? Thanks
newguy



Joined: 24 Jun 2004
Posts: 1908

View user's profile Send private message

PostPosted: Wed Aug 16, 2006 12:42 am     Reply with quote

The speed at which the PIC runs (executes instructions) is always the crystal speed (except in case of PLL) divided by 4. For those PICs with PLLs, if they are enabled, the execution speed will be the crystal speed since the PLL is x4.

So if your PIC's crystal is 20 MHz, the PIC actually runs at 5 MHz. This turns out to be one instruction every 200 ns (nanoseconds).

Most PIC instructions take one clock cycle to execute, but some can take 2 or more. The data sheet should help to clear this up for you.

When you see something like delay_us(2); in some code, the number of instruction cycles this delay will consume depends on the clock speed of the PIC. That's why each CCS program requires a #use delay statement - to let the compiler know how quickly the processor is running.
theteaman



Joined: 04 Aug 2006
Posts: 98

View user's profile Send private message

PostPosted: Wed Aug 16, 2006 1:00 am     Reply with quote

thanks newguy

another question.. is the PIC little or big endian?

EDIT:
also, why does 10MHz = 10Mbps in SPI mode?
treitmey



Joined: 23 Jan 2004
Posts: 1094
Location: Appleton,WI USA

View user's profile Send private message Visit poster's website

PostPosted: Wed Aug 16, 2006 8:23 am     Reply with quote

Newguy, I think you have that backwards.. or I misinterpreted
This is a quote from the 18F452 spec.
Quote:
A Phase Locked Loop circuit is provided as a programmable
option for users that want to multiply the frequency
of the incoming crystal oscillator signal by 4.
For an input clock frequency of 10 MHz, the internal
clock frequency will be multiplied to 40 MHz.
rwyoung



Joined: 12 Nov 2003
Posts: 563
Location: Lawrence, KS USA

View user's profile Send private message Send e-mail

PostPosted: Wed Aug 16, 2006 8:43 am     Reply with quote

theteaman wrote:
thanks newguy

another question.. is the PIC little or big endian?

EDIT:
also, why does 10MHz = 10Mbps in SPI mode?


Since for the smaller parts, the native word size is 8-bits (may be for the 24's and 30's too, really haven't looked) the endian-ness isn't an intrinsic function of the chip. You can look at a LST file to see how 16-bit numbers are handled. Functions like make8() imply that it is handling multi-byte values as little endian.

In the native 8-bit word (and control registers) the LS bit is typically the lowest order bit, i.e. bit 0.
_________________
Rob Young
The Screw-Up Fairy may just visit you but he has crashed on my couch for the last month!
ckielstra



Joined: 18 Mar 2004
Posts: 3680
Location: The Netherlands

View user's profile Send private message

PostPosted: Wed Aug 16, 2006 9:30 am     Reply with quote

theteaman wrote:
also, why does 10MHz = 10Mbps in SPI mode?
Don't mix up Fcy and Fosc.
Fosc is the oscillator frequency (Max 40 MHz).
Fcy is the instruction cycle frequency = 1/4 Fosc (Max. 10MHz)

The SPI maximum bitrate = Fcy = 10Mbps.
newguy



Joined: 24 Jun 2004
Posts: 1908

View user's profile Send private message

PostPosted: Wed Aug 16, 2006 11:44 am     Reply with quote

treitmey wrote:
Newguy, I think you have that backwards.. or I misinterpreted
This is a quote from the 18F452 spec.
Quote:
A Phase Locked Loop circuit is provided as a programmable
option for users that want to multiply the frequency
of the incoming crystal oscillator signal by 4.
For an input clock frequency of 10 MHz, the internal
clock frequency will be multiplied to 40 MHz.


You're right, that wasn't the clearest thing I've ever said.

The PLL exists so that you can use a relatively slow crystal to minimize EMI. The datasheet is correct in that the PLL multiplies the external xtal frequency by 4 internal to the PIC, but the internal system (instruction) clock is this multiplied frequency divided by 4. So, in a convoluted way, when you use the PLL the PIC's internal clock runs at the same speed as your xtal.
theteaman



Joined: 04 Aug 2006
Posts: 98

View user's profile Send private message

PostPosted: Wed Aug 16, 2006 5:12 pm     Reply with quote

Thank you everyone Smile
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group