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theteaman
Joined: 04 Aug 2006
Posts: 98
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| DEFINES for spi_setup |
 Posted: Sun Aug 13, 2006 4:59 am |
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Hello
I have searched through this board but am unable to know just what the 'SPI_CLK_DIV_*' definitions mean when dealing with SETUP_SPI(). I have a FLASH module that can run at either 20 or 50MHZ. My PIC currently uses a 40MHz crystal. What parameter should I be using to setup_spi()? Thanks |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Sun Aug 13, 2006 10:17 am |
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The constants in the CCS ".H" files for the PICs will usually be
abbreviations for settings that are explained in the PIC data sheet.
Look in the SPI section of the 18F452 data sheet. It says this:
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In Master mode, the SPI clock rate (bit rate) is user programmable
to be one of the following:
• FOSC/4 (or TCY)
• FOSC/16 (or 4 • TCY)
• FOSC/64 (or 16 • TCY)
• Timer2 output/2
This allows a maximum data rate (at 40 MHz) of 10.00 Mbps.
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theteaman
Joined: 04 Aug 2006
Posts: 98
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| Posted: Sun Aug 13, 2006 6:42 pm |
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| PCM programmer wrote: | The constants in the CCS ".H" files for the PICs will usually be
abbreviations for settings that are explained in the PIC data sheet.
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Thanks, I didn't realise this (newbie here).
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Look in the SPI section of the 18F452 data sheet. It says this:
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In Master mode, the SPI clock rate (bit rate) is user programmable
to be one of the following:
• FOSC/4 (or TCY)
• FOSC/16 (or 4 • TCY)
• FOSC/64 (or 16 • TCY)
• Timer2 output/2
This allows a maximum data rate (at 40 MHz) of 10.00 Mbps.
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From the datasheet, it seems FOSC is the 40MHz crystal I've connected, and TCY is the time for one cycle.
Soo, just to clarify, does this mean that if I used the define 'SPI_CLK_DIV_4', does that make the SPI work at 40/4 = 10MHz, and is 10MHz the same thing as 10Mbps? If so, could you explain why there is a one to one correlation between MHz and Mbps?
Finally, if I didn't add an SPI_CLK_DIV parameter to the setup_spi() function, would the SPI work at the clock rate of 40MHz (I'm assuming not by what you said earlier, but I just want to confirm).
If you could answer these questions it would be most helpful to me thoroughly understanding what is going on. 
Thanks |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Sun Aug 13, 2006 7:14 pm |
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The answer is in the data sheet:
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bit 3-0 SSPM3:SSPM0: Synchronous Serial Port Mode Select bits
0000 = SPI Master mode, clock = FOSC/4
0001 = SPI Master mode, clock = FOSC/16
0010 = SPI Master mode, clock = FOSC/64
0011 = SPI Master mode, clock = TMR2 output/2 |
Compare that to the constants in the .H file:
| Code: | #define SPI_CLK_DIV_4 0
#define SPI_CLK_DIV_16 1
#define SPI_CLK_DIV_64 2
#define SPI_CLK_T2 3 |
So if you don't supply a divisor parameter, it's the same as using 0x00,
which gives a divisor of 4. The data sheet shows that only four
combinations are possible. The divisor will be one of the four values
listed. So in your case 10 MHz is the highest speed you will get. |
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theteaman
Joined: 04 Aug 2006
Posts: 98
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| Posted: Sun Aug 13, 2006 7:59 pm |
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Thanks PCM Programmer
1 more question.. speaking of SPI at 10MHz. I'll actually be sending data from a 5V PIC to a 3.3V module. If I use a zener diode, would you say that the capacitance of the zener would be too high for such a high frequency? Would I be better suited to just use a voltage divider with say, a 120ohm and 220ohm resistor?
many thanks |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Sun Aug 13, 2006 9:59 pm |
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The capacitance would be too high with a Zener diode. The rise time
would be too long. You only have a 100 ns period at 10 MHz.
Your proposed voltage divider with 330 ohms total resistance to ground
is a little stiff. At a 5v nominal Voh, that's a 15 ma load on the pin.
You would need three of those, for SDO, SCK, and \CS. You should
probably use higher values for the resistors.
This thread has other proposals:
http://www.ccsinfo.com/forum/viewtopic.php?t=26522
I would use 74HCT and 74LVC buffers as level translators, as described
in this thread:
http://www.ccsinfo.com/forum/viewtopic.php?t=23154
There's another problem. I looked in the 18F452 data sheet at the
SPI master timing, at this section:
FIGURE 22-13: EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
It shows that setup and hold time for incoming data on the SDI pin
is 100 ns each. That amounts to a 5 MHz maximum clock frequency.
That assumes that the MMC card has no delay in outputting data.
But it will have some delay. I don't know what it is, you'll have to
look it up in the spec, but your real maximum SPI clock freq might
only be 4 MHz. |
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theteaman
Joined: 04 Aug 2006
Posts: 98
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| Posted: Sun Aug 13, 2006 10:20 pm |
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PCM programmer: you have been of great help. Thank you.
I dont think I need a level translator for 3.3V to 5V PIC pulses though, as the minimum VIH is lower than 3.3V anyway.. ??
Anyway thanks, i will use higher resistor values and keep an eye on the current |
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Ttelmah
Guest
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| Posted: Mon Aug 14, 2006 2:19 am |
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What you have to consider is that 'VOh', of the 3.3v chip, won't be 3.3v. Odd's are, that it'll be something like 2.6v. The 5v logic input, is not guaranteed at this voltage to see a '1'. You may well 'get away', with a pull up resistor on the 3.3v output pin, running to +5v, and a clamp diode from the same point, to the 3.3v rail, but for reliable operation, especially at high speed, a proper buffer is much more likely to work. There are chips that contain a couple of pairs of level translators in one package, which would do both required translations in one IC.
Best Wishes |
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theteaman
Joined: 04 Aug 2006
Posts: 98
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| Posted: Mon Aug 14, 2006 3:44 am |
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| Ttelmah: you are right, thanks. i am now convinced to just use an 18LF at 3.3V.... and get rid of all this wasted power! |
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ckielstra
Joined: 18 Mar 2004
Posts: 3680
Location: The Netherlands
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| Posted: Mon Aug 14, 2006 4:20 am |
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| theteaman wrote: | | Ttelmah: you are right, thanks. i am now convinced to just use an 18LF at 3.3V.... and get rid of all this wasted power! |
Then you'll have to lower the clock frequency as well, a PIC18LF won't run at 40MHz. Check your datasheet but it will be something like max. 16.6MHz, with SPI_CLK_DIV_4 you can then still clock your SPI at the maximum 4MHz. |
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theteaman
Joined: 04 Aug 2006
Posts: 98
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| Posted: Mon Aug 14, 2006 5:18 am |
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| ckielstra wrote: | | theteaman wrote: | | Ttelmah: you are right, thanks. i am now convinced to just use an 18LF at 3.3V.... and get rid of all this wasted power! |
Then you'll have to lower the clock frequency as well, a PIC18LF won't run at 40MHz. Check your datasheet but it will be something like max. 16.6MHz, with SPI_CLK_DIV_4 you can then still clock your SPI at the maximum 4MHz. |
i see... thanks for that info...... so you're saying i'll still reach the same max SPI speed either way? |
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ckielstra
Joined: 18 Mar 2004
Posts: 3680
Location: The Netherlands
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| Posted: Mon Aug 14, 2006 7:53 am |
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| theteaman wrote: | | so you're saying i'll still reach the same max SPI speed either way? |
I read the datasheet with the same understanding as PCMprogrammer, SDIsetup and hold time are 100ns each. With 200ns and a small margin a SPI read speed of 4MHz is than the maximum achievable, this equals the fastest setting of 16MHz/4 = 4MHz.
Strange thing though is that Microchip advertizes a maximum SPI speed of 10MHz, but maybe this is for transmission only. |
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theteaman
Joined: 04 Aug 2006
Posts: 98
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| Posted: Wed Aug 16, 2006 2:18 am |
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| ckielstra wrote: | | theteaman wrote: | | Ttelmah: you are right, thanks. i am now convinced to just use an 18LF at 3.3V.... and get rid of all this wasted power! |
Then you'll have to lower the clock frequency as well, a PIC18LF won't run at 40MHz. Check your datasheet but it will be something like max. 16.6MHz, with SPI_CLK_DIV_4 you can then still clock your SPI at the maximum 4MHz. |
What about if I used HS PLL with a 10MHz osc? Does the speed really drop to 16MHz at 3.3V? (Can't find it in the datasheet) |
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ckielstra
Joined: 18 Mar 2004
Posts: 3680
Location: The Netherlands
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| Posted: Wed Aug 16, 2006 3:31 am |
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You can find these figures in the chapter 'Electrical Characteristics'. Using the 4xPLL circuit is only a change in the way you are generating the system clock, it doesn't relate to the maximum allowed clock frequency at a certain voltage.
Details are different between PIC families, which processor model are you using? |
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theteaman
Joined: 04 Aug 2006
Posts: 98
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| Posted: Wed Aug 16, 2006 4:09 am |
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| ckielstra wrote: | You can find these figures in the chapter 'Electrical Characteristics'. Using the 4xPLL circuit is only a change in the way you are generating the system clock, it doesn't relate to the maximum allowed clock frequency at a certain voltage.
Details are different between PIC families, which processor model are you using? |
I'm using a 18F2525.. oh ok so you're saying using a 10MHz oscillator with PLL = using a 40MHz without PLL. BUT, according to the datasheet, it seems that the maximum oscillator that can be used is a 20MHz one, hence to achieve the highest speed you need to use PLL because a 40MHz wont actually work.. does that sound right? |
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