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Gregr Guest
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PIC18F8722 CVref RF5 conflict? |
Posted: Tue Feb 21, 2006 2:20 pm |
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I can not gain control of RF5 on a PIC18F8722.
ADCON1 is being set for Digital I/O after reset.
CVRCON bit 6 (CVROE) is set to zero.
Any ideas of what to check next would be appreciated!
Greg |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Tue Feb 21, 2006 2:27 pm |
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Quote: | I can not gain control of RF5 on a PIC18F8722.
ADCON1 is being set for Digital I/O after reset.
CVRCON bit 6 (CVROE) is set to zero.
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1. Post a small test program that shows how you do these things.
Also show your code that uses RF5 as a digital pin. Show your
#fuses, #use, #include statements. Make it a small, but
complete program that can dropped into MPLAB and compiled.
2. Post your compiler version. |
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Greg_R
Joined: 21 Feb 2006 Posts: 19 Location: San Diego
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Closing in on CVref Issue |
Posted: Tue Feb 21, 2006 4:41 pm |
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This problem is related to "setup_vref()."
If it is set to FALSE I can control F5.
If it is set to VREF_LOW|-2 I can't set F5 high.
ADCON1 and CVROE appear to be set correctly for both cases.
Release 3.236
#include <18F8722.h>
#device ICD=TRUE
#device adc=8
#FUSES NOWDT //No Watch Dog Timer
#FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale
#FUSES HS //High speed Osc (> 4mhz)
#FUSES NOPROTECT //Code not protected from reading
#FUSES IESO //Internal External Switch Over mode enabled
#FUSES BROWNOUT //Reset when brownout detected
#FUSES BORV25 //Brownout reset at 2.5V
#FUSES PUT //Power Up Timer
#FUSES NOCPD //No EE protection
#FUSES STVREN //Stack full/underflow will cause reset
#FUSES DEBUG //Debug mode for use with ICD
#FUSES LVP //Low Voltage Programming on B3(PIC16) or B5(PIC18)
#FUSES NOWRT //Program memory not write protected
#FUSES NOCPB //No Boot Block code protection
#FUSES NOEBTRB //Boot block not protected from table reads
#FUSES NOEBTR //Memory not protected from table reads
#FUSES NOWRTD //Data EEPROM not write protected
#FUSES NOWRTC //configuration not registers write protected
#FUSES NOWRTB //Boot block not write protected
#FUSES FCMEN //Fail-safe clock monitor enabled
#FUSES LPT1OSC //Timer1 configured for low-power operation
#FUSES MCLR //Master Clear pin enabled
#FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode)
#FUSES MCU //Microcontroller Mode
#use delay(clock=40000000)
#use rs232(baud=9600,parity=N,xmit=PIN_C6,rcv=PIN_C7,bits=9)
//**************************
#include "E:\SeQual\Stub1.h"
void main()
{
setup_adc_ports(NO_ANALOGS|VSS_VDD);
setup_adc(ADC_OFF|ADC_TAD_MUL_0);
setup_psp(PSP_DISABLED);
setup_spi(FALSE);
setup_spi2(FALSE);
setup_wdt(WDT_OFF);
setup_timer_0(RTCC_INTERNAL);
setup_timer_1(T1_DISABLED);
setup_timer_2(T2_DISABLED,0,1);
setup_timer_3(T3_DISABLED|T3_DIV_BY_1);
setup_timer_4(T4_DISABLED,0,1);
setup_comparator(NC_NC_NC_NC);
// setup_vref(FALSE);
setup_vref(VREF_LOW|-2);
setup_low_volt_detect(FALSE);
setup_oscillator(False);
while(1)
{
input_f();
output_low(PIN_H5); //Yellow LED On
delay_ms(1500);
output_f(0xFF); //Red LED On (RF7)
delay_ms(1500);
output_f(0x00); //Red LED Off (RF7)
output_high(PIN_H5); //Yellow LED Off
delay_ms(1500);
}
} |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Tue Feb 21, 2006 4:51 pm |
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That line creates ASM code that configures pin F5 as an input.
To fix it, just delete that line. The CVRCON register comes
up from reset in a disabled condition. You don't need to disable
it with a line of code.
I have a question. Is that line put in by the "Wizard"
or did you put it in ? |
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Greg_R
Joined: 21 Feb 2006 Posts: 19 Location: San Diego
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CVref |
Posted: Tue Feb 21, 2006 5:08 pm |
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That line is put in by the wizard. |
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Ttelmah Guest
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Posted: Wed Feb 22, 2006 3:44 am |
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I have just spent ten minutes trying the last half dozen compiler versions, and none of the wizards generate the pattern shown, for any of the Vref options. It sounds as if this may be a fairly old compiler version for this chip, which often have this sort of problem...
Best Wishes |
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