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shawnmulligan Guest
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Clock speed variations |
Posted: Tue Jan 28, 2003 7:58 pm |
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In driving Timer 1 on a 16F877A with an external 32768Hz oscillator, to allow a RTC with sleep mode. Additionally, the "awake" oscillator is 4MHz. It appears that I'm missing interrupts while in sleep mode as the clock runs slower in sleep mode than when awake. The Timer1 ISR is relatively small, just accumulating seconds and intervals, setting some flags, etc. The clock is stable. Any ideas? The RTC interrupt occurs every 62.5ms, executing a small routine that takes about 10ms to execute. The interrupt affects an I2C routine, using CCS I2C routines. Could these be masking interrupts? Didn't notice in the assembler code, but maybe I didn't look hard enough.
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This message was ported from CCS's old forum
Original Post ID: 11083 |
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Tomi Guest
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Re: Clock speed variations |
Posted: Wed Jan 29, 2003 2:01 am |
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If your PIC is really in sleep mode then the PIC's clock is not 32768Hz. The CPU clock is stopped instead. So under sleep you can not get interrupts from RTCC (the clock synchronization circuit is out of work because no clock ). Note that RTCC is never incremented under sleep (because of the same condition).
You can miss all other interrupts where the hardware is related to CLKOUT of PIC's clock circuit.
:=In driving Timer 1 on a 16F877A with an external 32768Hz oscillator, to allow a RTC with sleep mode. Additionally, the "awake" oscillator is 4MHz. It appears that I'm missing interrupts while in sleep mode as the clock runs slower in sleep mode than when awake. The Timer1 ISR is relatively small, just accumulating seconds and intervals, setting some flags, etc. The clock is stable. Any ideas? The RTC interrupt occurs every 62.5ms, executing a small routine that takes about 10ms to execute. The interrupt affects an I2C routine, using CCS I2C routines. Could these be masking interrupts? Didn't notice in the assembler code, but maybe I didn't look hard enough.
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This message was ported from CCS's old forum
Original Post ID: 11087 |
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shawnmulligan Guest
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Re: Clock speed variations |
Posted: Wed Jan 29, 2003 10:38 am |
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Sorry, I mis-spoke. I'm using Timer1, with a 32768 oscillator, to keep track of time, as it runs while the PIC is asleep. Further, in sleep mode, the PIC is asleep for 99\% of the time. The device loses about 1 second per hour while in sleep mode.
:=If your PIC is really in sleep mode then the PIC's clock is not 32768Hz. The CPU clock is stopped instead. So under sleep you can not get interrupts from RTCC (the clock synchronization circuit is out of work because no clock <img src="http://www.ccsinfo.com/pix/forum/smile.gif" border="0"> ). Note that RTCC is never incremented under sleep (because of the same condition).
:=You can miss all other interrupts where the hardware is related to CLKOUT of PIC's clock circuit.
:=
:=:=In driving Timer 1 on a 16F877A with an external 32768Hz oscillator, to allow a RTC with sleep mode. Additionally, the "awake" oscillator is 4MHz. It appears that I'm missing interrupts while in sleep mode as the clock runs slower in sleep mode than when awake. The Timer1 ISR is relatively small, just accumulating seconds and intervals, setting some flags, etc. The clock is stable. Any ideas? The RTC interrupt occurs every 62.5ms, executing a small routine that takes about 10ms to execute. The interrupt affects an I2C routine, using CCS I2C routines. Could these be masking interrupts? Didn't notice in the assembler code, but maybe I didn't look hard enough.
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This message was ported from CCS's old forum
Original Post ID: 11098 |
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Tomi Guest
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Re: Clock speed variations |
Posted: Wed Jan 29, 2003 11:52 am |
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How did you set up timer1?
If you use "setup_timer_1(T1_INTERNAL | T1_DIV_BY_1)" you will get an IT in every 2 seconds. But maybe you override Timer1 value in the ISR. In this case you must pay attention to insert "Set_Timer1()" instruction as the first in the ISR:
#int_timer1
void __TMR1()
{
SET_TIMER1(RTCreload);
if (!(--halfcnt)) ...... // other codes
:=Sorry, I mis-spoke. I'm using Timer1, with a 32768 oscillator, to keep track of time, as it runs while the PIC is asleep. Further, in sleep mode, the PIC is asleep for 99\% of the time. The device loses about 1 second per hour while in sleep mode.
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This message was ported from CCS's old forum
Original Post ID: 11104 |
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shawnmulligan Guest
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Re: Clock speed variations |
Posted: Wed Jan 29, 2003 12:04 pm |
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To interrupt every 62.5ms is first setup as:
setup_timer_1(T1_EXTERNAL | T1_DIV_BY_8);
then within the interrupt:
#INT_TIMER1
clock_isr() //** FIRES EVERY 1/16 SECOND//
{
set_timer1(0xFF00); //Re-set Timer1 register
...and this works correctly when the device is awake, but loses time when the device sleeps.
:=How did you set up timer1?
:=If you use "setup_timer_1(T1_INTERNAL | T1_DIV_BY_1)" you will get an IT in every 2 seconds. But maybe you override Timer1 value in the ISR. In this case you must pay attention to insert "Set_Timer1()" instruction as the first in the ISR:
:=#int_timer1
:=void __TMR1()
:={
:=SET_TIMER1(RTCreload);
:=if (!(--halfcnt)) ...... // other codes
:=
:=
:=
:=:=Sorry, I mis-spoke. I'm using Timer1, with a 32768 oscillator, to keep track of time, as it runs while the PIC is asleep. Further, in sleep mode, the PIC is asleep for 99\% of the time. The device loses about 1 second per hour while in sleep mode.
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This message was ported from CCS's old forum
Original Post ID: 11105 |
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Tomi Guest
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Re: Clock speed variations |
Posted: Wed Jan 29, 2003 12:35 pm |
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Just a thought:
"The Oscillator Start-up Timer (OST) provides 1024 oscillator cycle (from OSC1 input) delay after the PWRT delay is over. This ensures that the crystal oscillator or resonator has started and stabilized. The OST time-out is invoked only for XT, LP and HS modes and only on Power-on Reset or wake-up from SLEEP."
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This message was ported from CCS's old forum
Original Post ID: 11106 |
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shawnmulligan Guest
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Re: Clock speed variations |
Posted: Wed Jan 29, 2003 12:55 pm |
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I like that thought. I'm going to perform some experiments/calculations with that in mind. Thanks for the time you've spent on this question.
:=Just a thought:
:="The Oscillator Start-up Timer (OST) provides 1024 oscillator cycle (from OSC1 input) delay after the PWRT delay is over. This ensures that the crystal oscillator or resonator has started and stabilized. The OST time-out is invoked only for XT, LP and HS modes and only on Power-on Reset or wake-up from SLEEP."
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This message was ported from CCS's old forum
Original Post ID: 11107 |
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Guest
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Re: Clock speed variations |
Posted: Thu Dec 15, 2005 11:13 pm |
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shawnmulligan wrote: | Sorry, I mis-spoke. I'm using Timer1, with a 32768 oscillator, to keep track of time, as it runs while the PIC is asleep. Further, in sleep mode, the PIC is asleep for 99\% of the time. The device loses about 1 second per hour while in sleep mode.
:=If your PIC is really in sleep mode then the PIC's clock is not 32768Hz. The CPU clock is stopped instead. So under sleep you can not get interrupts from RTCC (the clock synchronization circuit is out of work because no clock <img src="http://www.ccsinfo.com/pix/forum/smile.gif" border="0"> ). Note that RTCC is never incremented under sleep (because of the same condition).
:=You can miss all other interrupts where the hardware is related to CLKOUT of PIC's clock circuit.
:=
:=:=In driving Timer 1 on a 16F877A with an external 32768Hz oscillator, to allow a RTC with sleep mode. Additionally, the "awake" oscillator is 4MHz. It appears that I'm missing interrupts while in sleep mode as the clock runs slower in sleep mode than when awake. The Timer1 ISR is relatively small, just accumulating seconds and intervals, setting some flags, etc. The clock is stable. Any ideas? The RTC interrupt occurs every 62.5ms, executing a small routine that takes about 10ms to execute. The interrupt affects an I2C routine, using CCS I2C routines. Could these be masking interrupts? Didn't notice in the assembler code, but maybe I didn't look hard enough.
___________________________
This message was ported from CCS's old forum
Original Post ID: 11098 |
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