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MikeValencia
Joined: 04 Aug 2004
Posts: 238
Location: Chicago
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| How to clear Timer1 or Timer3 in new PIC18Fxxx0? |
 Posted: Sat Dec 03, 2005 7:46 am |
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There is an errata that says that we are not supposed to write to Tmr1 or Tmr3 while the timer is running, nor let an event occur between writing to tmr1h and tmr1L (also tmr3h and tmr3L).
Does anyone know if CCS implements the workaround to this errata?
If not, how then would I implement the workaround to this?
Maybe, if i want to write a value to TMR3, e.g. clear it by writing 0 to it, would I then need to disable global interrupts, stop timer3, then write the desired value, then restart timer 3?:
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disable_interrupts(GLOBAL);
setup_timer3(T3_DISABLED); // This stops tmr3
set_timer3(0); // this clears timer3
setup_timer3(T3_INTERNAL | T3_DIV_BY_1); // this (re)starts tmr3 with a value of zero
enable_interrupts(GLOBAL);
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Mon Dec 05, 2005 3:51 pm |
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| Quote: | | Does anyone know if CCS implements the workaround to this errata? |
Post the PIC that you're using, and your compiler version. |
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valemike
Guest
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| Posted: Mon Dec 05, 2005 8:09 pm |
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It's the PIC18F4580. But the errata applies to the PIC18F4480, 18F2420, 18F2520. And i think it applies to the 2520, 4520 as well.
I'll probably do a .lst file listing and see what's going on.
It dawned on me earlier that it is best to simply stop the clock, then write the value i want. It would be useless to write to a clock that is running. |
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amcfall
Joined: 20 Oct 2005
Posts: 44
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| Posted: Tue Dec 06, 2005 8:15 am |
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Interesting. I'd better read through the errata, I have a project with the 2520 using timers 1 and 3. Thanks for bringing this up, I'd better read the erratas from now on!
Avery |
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valemike
Guest
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| Posted: Wed Dec 07, 2005 8:04 am |
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I haven't compiled with the 18F4580 since last week, so i have no CCS assembly to show.
Some Microchip FAEs were here yesterday though, and told me the proper way to do it. It's pretty obvious:
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disable_interrupts(GLOBAL);
stop timer1;
write to tmr1h and then to tmr1L;
enable_interrupts(GLOBAL);
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