double precision floating point

[lifespeed]

Hi,

I need to employ double precision floating point math in some C routines for the PIC18F8722. I am using the CCS compiler, but as far as I can tell it only supports single precision.

I realize I could employ some tricks, like doing the math in two steps, etc. Certainly if that is the only way, I will do so.

However, others must have run across this problem before and created nice routines to do double precision floating point math.

Are there any C libraries out there to double precision math? I need to do exponents also.

Thanks,
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Lifespeed

[Neutone]

The 32 bit floating point format supported by CCS requires a lot of code to support math operations. The math functions take a lot of space and a lot of time. Double precision floating point math operation would be much worse. You would need a PIC with loads of code space just for the math function and then you would have little room for anything else. Maybe you can find another way that requires less precision.

[SherpaDoug]

Tell us more about your application. Maybe we can tell you how to do it with less precision.
I use CCS to measure ship hulls and I have found that I can measure everything from the thickness of the steel to the length of a supertanker with just 24 bit integers. I have to use a different unit of measure to measure the thickness of the paint. ;-)
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[lifespeed]

It is not clear to me that my application can be done without double precision. A workaround would simply end up being a home-grown implementation of double precision.

I need to calculate a 48-bit integer for a DDS chip (direct digital synthesis) as well as a 20 bit integer for a divide number using, among others, the following equations.

a = floor((2^20*Fref/1000)/FGHz + 0.5)

seed1 = floor(a/2^7)*2^7; % forces LSB's to zero

dr1 = 2^20/seed1

Fref_act1 = FGHz*1000/dr1

DDS_bits = floor(2^48*Fdds/300 + 0.5)

Like I said, if it is possible to do this using single-precision, great. I tend to think it is not. Please help me locate some routines to do double precision in a large PIC.
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Lifespeed

[Douglas Kennedy]

With all the comments and misguided ideas about what floating point should do it might be worthwhile to look into a CCS BCD package. It could read a string like "1234.56x123456.789" and using BCD arithmetic generate a result string. It wouldn't be fast but it would mimic the handheld calculator result that many expect. IBM used packed decimal to store BCD values and did financial calcs in BCD to avoid base system ( binary to decimal) translation issues. The PIC SWAP instruction the only one I believe that operates on nibbles might have been designed to be used in this type of arithmetic.

[Ttelmah]

Looking at the actual arithmetic required, there are some important points. All the functions are designed to not need significant numbers after the decimal point. Also the only 'powers' involved, are of two, so can be performed by rotation. The only places fractional values are used, is to deal with rounding. Potentially then what is needed is a set of 64bit integer routines, allowing rotation, addition, division and multiplication. If these are used on the numbers scaled 'left' by one byte, the digits in the last byte become the fractional component. The routines all appear to have been aimed at 'fixed point', rather than floating point useage. :-)

Now a set of integer routines, is a lot easier/smaller than a set of FP routines. Some parts are already available (the rotations and masking for example). The difficulty as it stands, rests in the fact that the CCS integer routines, do not default to allowing access to the overflow bit. Otherwise the larger routines could be built using these. However (fortunately), MicroChip has a generic set of fixed point arithmetic routines like this, for up to 32*32, which has the output overflow available, and would therefore provide the core components needed. The 64 bit numbers could simply be held in a structure, making the seed1 function redundant (simply set the last two bytes to zero - remember I am proposing an extra 'fractional' byte). Look at AN617 for the core parts of these routines.

Best Wishes

[lifespeed]

[lifespeed]

Ttelmah,

The routines listed in Microchip AN617 look like just the ticket for what I need to do.

Do you have any knowledge of possible compatibility problems between these routines, written circa 1997 for the 17C processors (which I believe are 16 bit) and the 18F processors which are more recent?
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Lifespeed

[Ttelmah]

Generally, the assembler on all the processors is 'reverse compatible'. There are some improvements that may help on the latter processors (the hardware 8*8 multiply leaps to mind), and some extra addressing modes that could possibly reduce instruction counts by cutting the need for a lot of bank switching.

Best Wishes

[lifespeed]

After a closer look, the Microchip assembler routines don't look so helpful. They would need to be re-written to support 64-bit fixed point.

Is anyone aware of already-written 64-bit multiplication and division routines in either fixed point or floating point that I might use?

TIA,
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Lifespeed

[Ttelmah]

64bit libraries written in C, are readily available for download. There are a number available under the GNU license.
The point is though that to work, they require access to the overflow bit on the 32bit arithmetic, wihich CCS does not provide, but the MicroChip library does. Hence it's importance.
There is even a 'arbitrary precision' library supporting hundreds of digits precision, but the question is going to be how well it'll fit in a PIC...

Best Wishes

[lifespeed]

Thanks for the clarification. If it is possible to do 64 bit in assembly, it would be preferable because of speed considerations, but not absolutely necessary.

Just to make sure I've got this straight, I need to use the Microchip 32 bit math libraries, which provide the carry bit, to support 64 bit C libraries available under GNU license?
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Lifespeed

[Ttelmah]

Yes.
When you originally posted, I went searching. I found three high precision integer libraries, and one floating point one in C. The latter was big (very!), while the former required an error bit with the overflow to be present from the 32bit operations. Hence it was not useable with the CCS 32bit operations. However the MicroChip ones, should be adaptable. Only part of the full library is needed, since you only really need multiplication (do the divisions by saving the sign bit, and rotating, since only binary divisions are required), addition etc..
In fact the addition will expand dead easily (just add the LS 32 bits, save the carry, then add the MS 32 bits, and the carry), as will subtraction. Multiply is more complex, but even here it is just the matter of coding the four 32 bit multiplications, incuding the carry, and scaling the results.

Best Wishes

[MustardMan]

I note the last post on this topic was back in 2005, six years ago or so

CCS still only support single precision FP (32 bits), but I need double precision for my application. I did note that CCS support double (64bit) in the PIC24 & dsPIC families, but none of the others.

My application calls for conversion of Lat/Long to UTM co-ordinates with a precision of 1mm or better. Finding algorithims accurate to this level was not trivial in itself, but after I did find one, it was made very clear by the author that double precision was a must.

I want battery operation & a final device that is pocket sized, no bigger or power hungry than a hand-held GPS is. Using a full blown PC is not an option. It may be that I have to go for a PIC24 (or indeed, some other chip entirely).

[SherpaDoug]

It sounds like you should definitely avoid floating point in this application. Use very long integers instead. That way you know precisely when and where truncation or rounding may occur.

Note that banking and financial software NEVER uses floating point!
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The search for better is endless. Instead simply find very good and get the job done.