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RS232_erros

 
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RS232_erros
PostPosted: Wed Mar 02, 2005 11:23 am     Reply with quote

Does anyone know the means of every bit in the RS232_ERRORS variable?
Joe Porthouse



Joined: 21 Sep 2003
Posts: 8
Location: orlando, FL

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PostPosted: Wed Mar 02, 2005 12:33 pm     Reply with quote

From the #USE RS232 in the help file....

The definition of the RS232_ERRORS is as follows:

No UART:
· Bit 7 is 9th bit for 9 bit data mode (get and put).
· Bit 6 set to one indicates a put failed in float high mode.

With a UART:
· Used only by get:
· Copy of RCSTA register except:
· Bit 0 is used to indicate a parity error.


Lookup the RCSTA for the PIC microcontroller you are using. For instance for the 18C452...

bit 7 SPEN: Serial Port Enable bit
1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins)
0 = Serial port disabled (held in Reset)

bit 6 RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception

bit 5 SREN: Single Receive Enable bit
Asynchronous mode:
Don’t care.
Synchronous mode – Master:
1 = Enables single receive
0 = Disables single receive
This bit is cleared after reception is complete.
Synchronous mode – Slave:
Don’t care.

bit 4 CREN: Continuous Receive Enable bit
Asynchronous mode:
1 = Enables receiver
0 = Disables receiver
Synchronous mode:
1 = Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0 = Disables continuous receive

bit 3 ADDEN: Address Detect Enable bit
Asynchronous mode 9-bit (RX9 = 1):
1 = Enables address detection, enables interrupt and loads the receive buffer when RSR<8>
is set
0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit
Asynchronous mode 9-bit (RX9 = 0):
Don’t care.

bit 2 FERR: Framing Error bit
1 = Framing error (can be updated by reading RCREG register and receiving next valid byte)
0 = No framing error
bit 1 OERR: Overrun Error bit
1 = Overrun error (can be cleared by clearing bit CREN)
0 = No overrun error

bit 0 RX9D: 9th bit of Received Data
This can be address/data bit or a parity bit and must be calculated by user firmware.
CCS overrights this value with a parity error status bit.
Guest








PostPosted: Thu Mar 03, 2005 4:54 am     Reply with quote

thanks a lot Very Happy
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