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Voltage limits on port pins?

 
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valemike
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Voltage limits on port pins?
PostPosted: Mon Sep 27, 2004 6:01 am     Reply with quote

I religiously follow the guidelines that the maximum voltage on any pin with respect to Vss is Vdd + 0.3V. So if Vdd = 5V, then the maximum I can allow on any pin (except MCLR and RA4) is 5.3V.

However, I have seen numerous times in current designs at my workplace that they tie the output of a 24Vac transformer secondary directly to RB0 thru a 100K resistor.

The purpose of this circuit is to set up RB0 as an interrupt and measure when there are zero crosses since it is 24Vac coming in. There is a 100K resistor between the 24vac output and RB0 to limit the current.

I feel that such a circuit definitely exceeds the guidelines in the Microchip data manuals, but colleagues tell me that such a circuit is okay because the current is very small and that there are protection diodes in the PIC to easily clamp the 24V. Sure enough, I see that it is clamped, and that the voltage drop to go from 24vac down to 5v is absorbed by the 100K resistor.

I still wonder- is this okay? Or is it bad to do this and rely on internal protection circuitry?
Mark



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PostPosted: Mon Sep 27, 2004 6:17 am     Reply with quote

For low cost designs, it works.
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PostPosted: Mon Sep 27, 2004 6:33 am     Reply with quote

IMHO a simple serious resistor is a quick-and-dirty solution. A clamping diode means a simple diode: cathode is connected to Vcc and anode is connected to the input. So your voltage stabilizer (78L05 or same) must tolerate _reverse current_ ! 24VAC is 34V peek. 34-5 = 29V 29V/100kOhm = 290uA (!). I assume that you have a capac. at the output of the stabilizer. So this reverse current could rise the output voltage of the stabilizer even up to 6V (with a 100kOhm probably not; but what about humidity effects? 100 kOhm could be 60-70kOhm in a wet environment). If you use the internal A/D how can you tell the reference voltage (Vdd as reference is assumed).
I always use a signal conditioner circuit like a simple comparator or null indicator chip but even a plain npn transistor is a more correct solution...
SherpaDoug



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PostPosted: Mon Sep 27, 2004 7:00 am     Reply with quote

Microchip app note AN521 discusses synchronizing a PIC to AC power lines. They recommend a 5 Meg resistor from 110V AC to a PIC I/O pin to sense AC phase. This gives a peak current of 32uA. For high reliability applications they recommend using two resistors in series in case one fails short.

You have paid for those protection diodes. Why not use them?
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Ttelmah
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Re: Voltage limits on port pins?
PostPosted: Mon Sep 27, 2004 7:04 am     Reply with quote

valemike wrote:
I religiously follow the guidelines that the maximum voltage on any pin with respect to Vss is Vdd + 0.3V. So if Vdd = 5V, then the maximum I can allow on any pin (except MCLR and RA4) is 5.3V.

However, I have seen numerous times in current designs at my workplace that they tie the output of a 24Vac transformer secondary directly to RB0 thru a 100K resistor.

The purpose of this circuit is to set up RB0 as an interrupt and measure when there are zero crosses since it is 24Vac coming in. There is a 100K resistor between the 24vac output and RB0 to limit the current.

I feel that such a circuit definitely exceeds the guidelines in the Microchip data manuals, but colleagues tell me that such a circuit is okay because the current is very small and that there are protection diodes in the PIC to easily clamp the 24V. Sure enough, I see that it is clamped, and that the voltage drop to go from 24vac down to 5v is absorbed by the 100K resistor.

I still wonder- is this okay? Or is it bad to do this and rely on internal protection circuitry?

The 'key' is to remember that the limit is on the voltage actually applied to the pin. You are not applying 24v to the pin, but 24v to the opposite end of the resistor, that feeds the pin. The pins have a 'clamp' specification as well (Input clamp current), which specifies how much current the protection circuit can handle. So long as you operate well inside this, the actual voltage at the pin will be 'in spec'.
However it is important to remember that the 'clamp' circuit links to the supply rail. If (for instance), you have a PIC that only draws 1mA from the supply, and with no other circuitry connected to this part of the supply, then feed an input from 24vAC, and use a 10000R resistor, then on the +ve excursion, about 1.9mA, will want to flow through the clamp circuit. This will be enough to raise the supply rail, and risk overvoltaging the chip. 20K, with a low power circuit, may be 'close' to this behaviour. The same applies to any 'clamp' based on a diode to the supply rail (including an external one to the chip). This is why adding an external zener diode to limit the incoming voltage may be a better solution (but you then have to consider the capacitance of this circuit, and the rather 'soft' behaviour of real zener diodes...).
There is also another danger, which relates to input 'latch up'. Though this is generally rare on the PIC, if the input is present, while the chip is unpowered, it is possible for the input gate to latch up (or down), if the input is pulled outside the supply rail as power is applied. Lower current reduces the risk of this.

Best Wishes
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