High Priorty ISR

[Trampas]

I am using the PIC18F series processor and was wondering how I use high priorty interrupts with the CCS compiler?

Thanks
Trampas

[Mark]

Search the board. That question has been asked within 2 days.

[Trampas]

I read the post and found the problems I was having. Or at least some of them.

Specifically I noticed in the disassembly that CCS does not save any registers for the fast interrupt. I would have expected that they would at least save the ones twiddled with like status register...

Second I found that you can only have one fast interrupt which of course is a pain in the butt. But I guess you could hack it by using the fast interrupt as your global interrupt handler, but you still need to write all code in assembley to know what registers to save or spend your days reading the disassembly.

Trampas

[Mark]

The PIC saves the status register, wreg, I believe the BSR and maybe some more. Look at the datasheet for the PIC and you can find which ones are saved.