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PCH indirect addressing generated code

 
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ECL
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PCH indirect addressing generated code
PostPosted: Mon Jun 28, 2004 6:26 pm     Reply with quote
I'm new to PIC asm, and I'm learning by looking at compiler output. I'd like to optimize an isr to be as few instructions as possible. Most of my code is in C, but the isr is in assembly.

This code for a pointer stored in the access RAM to data elsewhere:
Code:
 output_D(*ptr);

generates
Code:
  MOVF   56,W
  MOVWF  FSR0L
  MOVFF  57,FSR0H
  MOVFF  INDF0,70A
  MOVFF  70A,LATD


This is with PCH version 3.202 with a 18F6720 target MCU. Note that the BSR is not needed (yea!). Does anyone know:
1) Why the move to 70A, then 70A to LATD. Can it just be LATD?
2) Can I map my pointer to FSRx and just use that directly, or at least reserve one FSRx for my own asm routines to use? I can avoid a lot of moves that way and save cycles (any maybe use post increments too).

Thanks in advance to all you asm mavens for your help![/code]
Neutone



Joined: 08 Sep 2003
Posts: 839
Location: Houston

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PostPosted: Tue Jun 29, 2004 7:42 am     Reply with quote
There are three FSR's I have never compiled code that I noticed was using the thrid. Your probably safe using the third with interupts but don't take my word for it because things have a way of changing. Post increments should work if you only need a single interupt with indirect addressing.
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