View previous topic :: View next topic |
Author |
Message |
hmmpic
Joined: 09 Mar 2010 Posts: 314 Location: Denmark
|
More and more instructions are displayed as address... |
Posted: Mon Apr 18, 2022 11:44 am |
|
|
More and more instructions are displayed as the address and not as their name.
It takes so long time to debug the code in the .lst file.
CCS 5105. and all other version. The older compiler the better it look. Newer compiler are the worst:-(
At Option->Project->OutputFile I have set it to "Symbolic".
Example(as a test only!):
#pin_select INT1 = PIN_B2
Move =0x0A to INT1PPS
But they always use the Addresses. So hard to read, none knows all the regs. all time i must use the data sheet, yes i already use it, not for that. More ease just to use assembler:-)))
This is the startup code for a PIC18F27K42, in my test. Look at my few comment.
Code: |
.................... void main(void){
00052: MOVLB 39
00054: BSF xE5.7
00056: BCF xE5.6
00058: CLRF TBLPTRU
0005A: BCF INTCON0.IPEN * So lucky :-)
0005C: MOVLB E
0005E: MOVLW 55
00060: MOVLB 3A -> *
00062: MOVWF xBF
00064: MOVLW AA
00066: MOVWF xBF
00068: BCF xBF.0
0006A: MOVLW 0A -> * Move 0xA to 0x3AC1 Address
0006C: MOVWF xC1 -> * This is the "INT1PPS" WHY NOT JUST USE THAT!
0006E: MOVLW 17
00070: MOVWF xE5
00072: MOVLW 13
00074: MOVWF x16
00076: MOVLW 55
00078: MOVWF xBF
0007A: MOVLW AA
0007C: MOVWF xBF
0007E: BSF xBF.0
00080: MOVLB 39
00082: CLRF xDE
00084: CLRF xDB
00086: CLRF xDD
00088: MOVLW 03
0008A: MOVWF xDF
0008C: MOVLW 60
0008E: MOVWF xD9
00090: CLRF rs232_errors
00092: MOVLB 3D
00094: BCF xF3.7
00096: BCF TRISC.6 And here too lucky day
00098: BSF LATC.6
0009A: MOVLW B0
0009C: MOVWF xF2
0009E: CLRF xF6
000A0: MOVLW 22
000A2: MOVWF xF5
000A4: CLRF xF4
000A6: BSF xF3.7
000A8: MOVLB 3A
000AA: CLRF x40
000AC: CLRF x50
000AE: CLRF x60
000B0: CLRF x80
000B2: MOVLB 3E * So bad!
000B4: CLRF xBD *
000B6: CLRF xBE *
000B8: CLRF xBF *
000BA: CLRF xBC *
000BC: CLRF xB9 *
000BE: CLRF xBA *
000C0: CLRF xBB *
000C2: CLRF xB8 *
|
Comment? |
|
![](templates/subSilver/images/spacer.gif) |
alan
Joined: 12 Nov 2012 Posts: 357 Location: South Africa
|
|
Posted: Tue Apr 19, 2022 12:10 am |
|
|
Same problem that I picked up, thought it were just there Linux compiler. The dsPIC are the worst. |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19358
|
|
Posted: Tue Apr 19, 2022 12:36 am |
|
|
The point is that bank based addressing is being used. It can't display
the partial (lower 8bit) address as the full register address, the assembler
wouldn't work if it did.
It has to live with what the assembler can accept. |
|
![](templates/subSilver/images/spacer.gif) |
PCM programmer
Joined: 06 Sep 2003 Posts: 21708
|
|
Posted: Tue Apr 19, 2022 12:46 am |
|
|
CCS knows that it's loading the bank select register with 0x3E.
Why can't CCS combine the 3E with the BD and get 3EBD, and
then lookup what register is in their chip database, and then
display it as CM1CON1 in the .LST file ? |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19358
|
|
Posted: Tue Apr 19, 2022 1:58 am |
|
|
They couldn't really display it in the .LST, since this is what they feed to
their internal assembler. However it should/would be possible to display
it as a comment in the line.
Ask them.
If they support the Microchip assembly syntax (at times they are close to
this), then this syntax should be allowable:
MOVWF low(CMCON1)
Which would then assemble correctly, but would also make it plain what
is being done... ![Smile](images/smiles/icon_smile.gif) |
|
![](templates/subSilver/images/spacer.gif) |
hmmpic
Joined: 09 Mar 2010 Posts: 314 Location: Denmark
|
|
Posted: Tue Apr 19, 2022 11:10 am |
|
|
I'am with @"PCM programmer" on this..
I have made a report with example and description and mailed it to CCS:-) They reply, no time at the moment.
There are another way to do it. Do a special file for it, and call it .reg_list
and use that file when we set this: Project->Output_File->"Symbolic".
Newer chip have so many config and so many addresses, it is so hard to get a clean view at the moment. |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19358
|
|
Posted: Tue Apr 19, 2022 11:23 am |
|
|
I'm with you all in wanting this, but it is not quite as simple as it may
appear. The point is that the register address is a 16bit value. The syntax
of the assembler does not allow a 16bit value to be put into an 8bit field.
This is why it'd need somthing equivalent to the low/high commands
to only put the 8bit value into the field.
So it needs a significant change, but one that really would be worthwhile. |
|
![](templates/subSilver/images/spacer.gif) |
temtronic
Joined: 01 Jul 2010 Posts: 9168 Location: Greensville,Ontario
|
|
Posted: Tue Apr 19, 2022 1:11 pm |
|
|
hmm.. wonder how much fun it'd be to create a program to read the listing line by line, read the instruction, if it has a register, then read the 'address', lookup 'address' and grab the 'register' name.
this would create a new listing with proper symbolic names.
I know first challenge is the 'database' of register addresses <> names...
Be nice guys, I got 3" of snow overnight....arrrgh... |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19358
|
|
Posted: Wed Apr 20, 2022 1:26 am |
|
|
'Possible', but a relative 'lot of work', since it'd have to keep track of working
out the full address from the page value as well.
It honestly would be easiest if CCS could just add the register involved
(since they 'know' it when generating the assembler), as part of a remark
on the lines.
Better for everyone. ![Very Happy](images/smiles/icon_biggrin.gif) |
|
![](templates/subSilver/images/spacer.gif) |
blowtorch
Joined: 11 Jun 2013 Posts: 35 Location: Cape Town
|
|
Posted: Tue Apr 26, 2022 9:15 am |
|
|
Agreed more better info would be great. I am trying to debug some code that worked on another chip, now ported over to the PIC16LF18877. Having problems with hardware SPI and wanted to check what is being set in the .lst file but all just addresses. |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19358
|
|
Posted: Wed Apr 27, 2022 3:10 am |
|
|
It looks as if CCS may have done this for PCD. Using 5.108:
If I select Options, Project, Output files, and tick SFR Names, Symbols &
Interpret, I get:
Code: |
0E5F6: BCLR.B 742.6 : OSCCON.IOLOCK = 0
0E5F8: MOV #1800,W0 : W0 = 1800
0E5FA: MOV W0,6A0 : RPINR0 = W0
0E5FC: MOV #27,W0 : W0 = 27
0E5FE: MOV W0,6C4 : RPINR18 = W0
0E600: MOV #38,W0 : W0 = 38
0E602: MOV W0,6C6 : RPINR19 = W0
0E604: MOV #32,W0 : W0 = 32
0E606: MOV W0,6D6 : RPINR27 = W0
0E608: MOV #2D,W0 : W0 = 2D
0E60A: MOV W0,6D8 : RPINR28 = W0
0E60C: MOV #11,W0 : W0 = 11
0E60E: MOV W0,682 : RPOR1 = W0
|
So on the line MOV W0,6A0, there is now the comment : RPINR0 = W0
Saying which register is actually being loaded.
This seems to be the 'interpret' option.
On the older compilers it didn't want to let all these options be selected
at once. Now it does.
Certainly makes it really easy to find every location where a particular
register is changed 'by name', and know which registers are actually
being set.
This behaviour and 'option set', does not seem to be available for the
older PIC's (16/18 etc.).
So I think the request back to CCS, needs to be "can you give us the
'interpret' option on these smaller PIC's please". |
|
![](templates/subSilver/images/spacer.gif) |
hmmpic
Joined: 09 Mar 2010 Posts: 314 Location: Denmark
|
|
Posted: Sun May 01, 2022 6:51 am |
|
|
@Ttelmah, I only have the 5015 so can't check...
If compiling to a PIC18F26Q10 or PIC18F26K22 or other, then you say it won't show the information? |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19358
|
|
Posted: Sun May 01, 2022 9:44 am |
|
|
No, they added this option on the DsPIC's a while ago, but it didn't fully
work. With 5.108, it seems at last to be generating nice results. Does
imply they are working on it, but a similar option needs to appear for the
smaller PIC's. |
|
![](templates/subSilver/images/spacer.gif) |
blowtorch
Joined: 11 Jun 2013 Posts: 35 Location: Cape Town
|
|
Posted: Sun May 01, 2022 11:08 am |
|
|
Using the CCS IDE, under Options, Project, Output files, ticking "Symbolic" when compiling for PIC16 provides for more info, register names etc in the .lst file. Example:
Code: | BCF TRISA.TRISA1
0041: BSF LATA.LATA1
.................... //gbl_cnt_b++;
0042: MOVLW FF
0043: MOVLB 3E
0044: XORWF 4A,W
0045: ANDWF 4A,F
0046: MOVLB 0E
0047: BCF PIR0.IOCIF |
There doesn't appear to be an option in the MPLABX IDE to set this. The help file for CCSC.exe says for the command line compile, adding "+LY" will output a symbolic list file. It would be nice to configure MPLABX to do this by default. I tried adding it under MPLABX "embedded option" but it did not like it. It may be possible to add it somehow. |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19358
|
|
Posted: Mon May 02, 2022 1:48 am |
|
|
No Blowtorch.
If you look, it nicely gives the register names where it is writing directly
to a register as a direct address, but does not where it is writing to the
registers using a banked address. It is this lack that is being complained
about.
On MPLAB, you can manually edit the command line it sends to the
compiler, adding +LY to enable the symbolic output, but it still leaves
the problem.
For example:
Code: |
0202: MOVF TABLAT,W ;Merrily gives the register name
0204: MOVLB 39
0206: BTFSS xA6.7 ;but here doesn't.... - this is PIR6
0208: BRA 0206
|
|
|
![](templates/subSilver/images/spacer.gif) |
|