read eeprom and global interrupt PIC18F46K22

[Fabri]

Hello,
Checking assembler generated from CCS V5.077 I realized CCS routine called "read_eeprom" set and reset global interrupt during eeprom read operation. Generally microchip datasheet don't request this for read operation. This happens also in read routine not under interrupt.

Somebody can explain me why ?

Thanks,

[Ttelmah]

Presumably just to avoid the possibility of anything in the interrupt code
changing a register setting that affects this. If you have any form of table
read operation in the interrupt (array access), this could cause problems.
Remember though that the 'read; is very fast, so unlike the write where
interrupts are disabled for a significant time, the effect of this should be
tiny.

[Fabri]

I supposed so but I was considering whether this operation is not negligible.
I'm going to do some about it. My question comes because I have a random delay in phase controls under timer interrupt never saw before.

[temtronic]

It's a 'better safe than sorry' chunk of code. As Mr. T. points out, the compiler can't 'know' all interactions of what your code could do, so prevents a possible event (interrupt) from altering a known event (R/W EEPROM).

As for the 'random delay' problem, post the ISR, maybe we can see something. Perhaps go back a few versions to a previously known 'good' version. Hopefully you have incremental versions of the program and not just one that you keep editing, and reediting, and reediting.....

[Ttelmah]

The time involved in a read should literally only be a handful of machine
instructions.