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Marco27293
Joined: 09 May 2020 Posts: 126
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PIC18F47J53 CCS C Compiler 5.090 Hex file Format |
Posted: Wed Jul 15, 2020 5:13 am |
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Hi,
I'm updating my project in order to pass from PIC18F46J50 (64K Program memory ROM) to PIC18F47J53 (128K Program memory ROM).
I need to know how the different memory size is managed in creating hex file.
I mean hex file for 64K ROM follow this format: https://www.engineersgarage.com/tutorials/hex-file-format/
How is the format for PIC18F47J63 128K ROM case?
Please, explain an instruction structure step by step like in the above link, I need to know this specifics to proceed.
Any help and feedback is appreciated.
Marco |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19520
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Posted: Wed Jul 15, 2020 5:55 am |
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Basically exactly the same.
However the key is the extended address.
Look at a page that gives rather more details about the Intel hex format.
For example:
<http://www.keil.com/support/docs/1584/>
Look particularly at extended segment address. This gives the ability
To add an upper 16bit 'offset' to the subsequent records. |
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Marco27293
Joined: 09 May 2020 Posts: 126
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Posted: Wed Jul 15, 2020 7:46 am |
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Thank you Ttelmah,
1) What is difference between Extended Linear Address Records and Extended Segment Address Records? Which should I consider?
2)When i try to build my project I get this error:
Code: | C:\Users\marcu\MPLABXProjects\Hive_Tech_V1\Lib\loader_3Bee.c:90:2: Info#300 More info: Segment at 00000-00008 (0000 used)
C:\Users\marcu\MPLABXProjects\Hive_Tech_V1\Lib\loader_3Bee.c:90:2: Info#300 More info: Segment at 0000A-00016 (0000 used) Priv
C:\Users\marcu\MPLABXProjects\Hive_Tech_V1\Lib\loader_3Bee.c:90:2: Info#300 More info: Segment at 00018-0FFFE (0000 used)
C:\Users\marcu\MPLABXProjects\Hive_Tech_V1\Lib\loader_3Bee.c:90:2: Info#300 More info: Segment at 10000-1FFF6 (0000 used)
C:\Users\marcu\MPLABXProjects\Hive_Tech_V1\Lib\loader_3Bee.c:90:2: Info#300 More info: Attempted to create: 0001A-1EB7E for #org
C:\Users\marcu\MPLABXProjects\Hive_Tech_V1\Lib\loader_3Bee.c:90:2: Error#126 Invalid ORG range |
I use following code:
Code: |
#include <18F47J53.h>
// Localize loader code
#define RESET_VECTOR 0x0000 // Defined by hardware
#define HIGH_INT_VECTOR 0x0008 // Defined by hardware
#define NORMAL_INT_VECTOR 0x0018 // Defined by hardware
#define INTERRUPT_END 0x001A // End of the interrupt area
#define LOADER_START 0x1EB7F // Loader code start: Developer choice
#define LOADER_END 0x1FF7F // Loader code end : Developer choice
#define BUFFER_LEN_LOD 64
#build(reset=0x0000, interrupt=0x0008)
#org HIGH_INT_VECTOR+2, NORMAL_INT_VECTOR-1 {}
#org INTERRUPT_END, LOADER_START-1 {} // APPLICATION AFTER DOWNLOAD
#org LOADER_END+2, (getenv("program_memory")-1) {}
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Before I used this and was working fine:
Code: |
#include <18F46J50.h>
// Localize loader code
#define RESET_VECTOR 0x0000 // Defined by hardware
#define HIGH_INT_VECTOR 0x0008 // Defined by hardware
#define NORMAL_INT_VECTOR 0x0018 // Defined by hardware
#define INTERRUPT_END 0x001A // End of the interrupt area
#define LOADER_START 0xEB7F // Loader code start: Developer choice
#define LOADER_END 0xFF7F // Loader code end : Developer choice
#define BUFFER_LEN_LOD 64
#build(reset=0x0000, interrupt=0x0008)
#org HIGH_INT_VECTOR+2, NORMAL_INT_VECTOR-1 {}
#org INTERRUPT_END, LOADER_START-1 {} // APPLICATION AFTER DOWNLOAD
#org LOADER_END+2, (getenv("program_memory")-1) {}
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What is the problem ?? |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19520
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Posted: Wed Jul 15, 2020 9:43 am |
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CCS defaults to using linear addressing, not segment address.
The page I pointed you to, explains the difference.
An example of building with a high memory bootloader beyond
0xFFFF is here:
<http://www.co.optimengineering.com/forum/viewtopic.php?p=215046> |
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