View previous topic :: View next topic |
Author |
Message |
E_Blue
Joined: 13 Apr 2011 Posts: 417
|
Handling UART errors |
Posted: Thu May 02, 2019 7:56 am |
|
|
I'm trying to port a PIC18F code to PIC24FJ
In the old code I declared the bits FERR1 and OERR1 to handle the errors inside the interrupt.
Now I wonder if CCS compiler has some way to handle it in more portable way or should I declare those bits again.
CCS V5.078 _________________ Electric Blue |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19513
|
|
Posted: Thu May 02, 2019 8:15 am |
|
|
You do realise, that if you declare the UART setup, with the keyword
'ERRORS', the compiler automatically adds code to reset the errors, and
copies the error bits into the RS232_ERRORS register. |
|
|
E_Blue
Joined: 13 Apr 2011 Posts: 417
|
|
Posted: Thu May 02, 2019 11:08 am |
|
|
Yes, but I haven't clear how it works.
Also, in the CCS help it says that copy the RCSTA register to RS232_BUFFER_ERRORS so you need to know how the hardware works and the bit order in order to check if there any error or if you can read new data.
I started about 20 years ago with pure assembler code and let that the compiler do the job makes me feel like I'm losing the control of the code and a bit messy.
Thinking a bit more may be I must use kbhit() before read from the hardware buffer and forgot about the errors bits. _________________ Electric Blue |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19513
|
|
Posted: Thu May 02, 2019 1:53 pm |
|
|
The OERR, and FERR bits are in the same location for all PIC's that I know.
The only difference for PIC24's, is you do have a PERR bit as opposed to
the software parity error bit that CCS generates on the PIC16/18.
Bit1 = OERR
Bit2 = FERR
Bit3 = PERR, while on the older PIC's without the hardware this is generated
into Bit0.
This is updated _when_ you have read a byte, and shows what errors were
found when the read routine was called. |
|
|
|