Interrupt in Pic microcontroller

srikrishna · Joined: 06 Sep 2017 Posts: 82

What is the difference between peripheral interrupt and global Interrupt in PIC micro controller??

Ttelmah · Joined: 11 Mar 2010 Posts: 19515

You really need to read the interrupt section in the chip's data sheet. This does cover it all to varying depths (better on older sheets). On a chip like the PIC18F1230, there is a very good description.

Answer depends a bit on what you are asking!.
There is an enable bit for each individual interrupt source, and then a 'global' bit. An interrupt will only call it's handler, when three things all happen:
1) The interrupt triggers and it's flag sets.
2) It is enabled.
3) the global enable is also set.

So you have to enable both the interrupt itself, and the global enable before an interrupt can trigger.

Separately there is then 'how things are handled'. When an interrupt triggers on PIC16/18's there is only one actual interrupt vector (two on the PIC18's, if priorities are enabled). All interrupts call the same vector. This is called 'INT_GLOBAL'. By default the compiler automatically generates a handler for this that then polls all the enabled interrupt bits, and automatically vectors to the actual handler for the interrupt that has triggered 'INT_xxxx'. So you have a choice of letting the compiler do the 'housekeeping' for you and declaring an interrupt as INT_RDA (for example), which will then be called when the event occurs, with all registers correctly saved for you, or writing your own 'INT_GLOBAL', which can be faster, but brings the requirement that you save every register used, and test what interrupt has actually triggered yourself...

srikrishna · Joined: 06 Sep 2017 Posts: 82

What is the meaning of MASKED by

temtronic · Posted: Mon Oct 15, 2018 9:11 am

TMR01E is the bit that enables interrupt to be 'seen' by the PIC. Timer0 WILL generate a 'flag' ( set TMR01F bit) every time it overflows, say from FF to 00.
How you program the PIC to handle interrupts is, well, your decision. uChip allows you to 'mask' or hide or in this case disable the PIC from seeing the interrupt generated by timer0.
Depending on application you may not want an interrupt from Timer0.
As Mr. T points out, every peripheral has an 'Interrupt Enable' bit, usually located in an INTerrupt CONtrol register(INTCONxx). It's up to you to decide if you use or not.
ba aware though if you enable an interrupt source you MUST code a 'handler' or ISR for it !! If you don't the PIC will probably 'crash'.

Jay

Ttelmah · Joined: 11 Mar 2010 Posts: 19515

and just to explain nomenclature TMR0IE is TiMeR 0 Interrupt Enable (letters used in the shorthand in capitals).

srikrishna · Joined: 06 Sep 2017 Posts: 82

srikrishna · Joined: 06 Sep 2017 Posts: 82

What happened if i don't clear the TMR0IF bit??

temtronic · Posted: Tue Oct 16, 2018 7:07 am

IF you never enabled the interrupt, nothing. The flag bit is set and stays set. There's no code that looks to see if it's set.
however...
If you do have it enabled and your ISR does NOT clear the flag, then the PIC will probably keep executing the ISR as the flag is always set.

Ttelmah · Joined: 11 Mar 2010 Posts: 19515

The compiler does automatically clear this bit at the end of the interrupt handler, unless you specifically tell it not to.

As one more 'comment'. Things like the timer interrupt flag can be cleared. However some of the interrupt flags cannot actually be cleared in the chip, till the 'trigger event' itself is cleared. So (for instance), INT_RDA, cannot have the flag cleared, until you read the byte from the receive register. INT_RB cannot be cleared till you physically read the port to clear the mismatch condition. Caveat.