Parts with the ENVREG pin...data sheet contradictory

[newguy]

PIC18F66K90.

Section 28.3, page 442/570: if the regulator is disabled (ENVREG tied to ground), a 0.1uF cap should be placed between VddCORE/VCAP and ground.

Section 2.4, page 37/570: when the regulator is disabled, the VddCORE/VCAP pin must be tied to a voltage supply at the VDDCORE level. The data sheet then tells you to consult section 31 "electrical characteristics" for information on VddCORE, but VddCORE isn't mentioned in section 31 at all.

Application: 3V battery power. Do I tie VddCORE to Vdd and add a 0.1uF cap close to VddCORE or do I just put a 0.1uF cap on the VddCORE pin and NOT tie it to Vdd?

[PCM programmer]

This is clarified in the Errata. Look in this section at the bottom of page 10:

[newguy]

Thanks PCM. I did do a quick glance at the errata, but obviously a little too quick.

[Ttelmah]

On section 31, you have to remember that with the regulator disabled, Vdd==Vddcore. So there are a lot of references in this section to Vdd with the regulator disabled, which then apply to the voltage present on Vddcore...

[newguy]

But the data sheet also refers to two distinct voltage regulators, otherwise identical, with the difference being that the one can be disabled. The data sheet refers to the other as a very (or ultra?) low power unit.

[Ttelmah]

The ultra low power regulator is just for the circuitry that remains awake in sleep mode.