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guy
Joined: 21 Oct 2005 Posts: 297
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Current-controlled mode / Current-controlled drive |
Posted: Mon Jun 27, 2016 11:43 pm |
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Although this is not to do with CCS, can anyone explain the exact specifications of the new current-controlled I/O pins in the PIC16F18855 ?
This feature allows to set a 1/2/5/10mA current limit output (sink/source) on each pin* (see exact options in the datasheet).
I understand what the datasheet says about adding an external resistor to dissipate the power and the calculation required.
My question is how much power can the I/O dissipate internally? If I short a single I/O to ground and limit the current to 10mA will it be damaged? what about 1mA?
I want to use this feature as a symbolic short-protection on I/Os. I don't need more than that and it will save a bunch of components. |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19596
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Posted: Tue Jun 28, 2016 1:40 am |
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No simple answer I'm afraid. It depends what else your chip is doing.
Unfortunately, Microchip have not yet documented this properly (perhaps talk to them). So they tell you that when this is enabled, the Vddio current will rise, but they don't document by how much. So you should start by measuring with this enabled, and no current drawn, and with your PIC otherwise doing everything it will normally do (switching lines etc..). Then I'd double the figure measured (to allow for variations in other chips), and calculate from this.
If they gave a proper theoretical min/max figure for this, then it'd be a matter of summing all the consumptions of the peripherals you are using, and the consumption of the chip at your clock rate (take the worst case figures in each case).
Then the critical figure is the last one in table 37.1 'maximum power dissipation'.
So if the chip reads as drawing (say) 60mA fully operational with no current drawn on the output pin(s) (at 5v), and you want to run two pins at 10mA each on top, I'd double this measure, and say the chip will draw 120mA 'worst case', and therefore dissipate 600mW (0.12*5). Then two output pins at 10mA each, could dissipate another 50mW each, which should be OK. However if you wanted to do this with four pins, then you'd be right at the limit.
Separately from power, there is also the issue of maximum current. This is much lower if the chip is being specified to run over the full temperature range (same part of the data sheet), and you may well hit this before the power limit.
I would talk to Microchip. It's a new item, that they haven't yet properly documented.
Last edited by Ttelmah on Tue Jun 28, 2016 2:15 am; edited 1 time in total |
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guy
Joined: 21 Oct 2005 Posts: 297
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Posted: Tue Jun 28, 2016 2:02 am |
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Thank you Ttelmah.
I'm sure Microchip will come up with figures and graphs when the datasheet is updated.
As for me, I don't plan to go anywhere near the total power dissipation limit, and the ambient temp. is 25 deg.C
The only consideration in my case is that for a single pin, the local heat produced by the internal current regulator (shunt) during a short will not cause damage (if I understand their design correctly). Worst case is 5V*10mA = 0.05W but I don't know what happens inside the silicone and if this heat is significant or not. |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19596
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Posted: Tue Jun 28, 2016 2:19 am |
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As you were typing I updated my post, since if you wanted to run right up at the limits of the industrial chip, you'd hit the 'maximum current' limit before the maximum power one.
It really does depend on how many pins you are involving. At 1mA, I don't think you are likely to hit problems. At 10mA, just 5 pins could give you 250mW extra dissipation, and then really resistors could easily be necessary. |
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guy
Joined: 21 Oct 2005 Posts: 297
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Posted: Tue Jun 28, 2016 2:40 am |
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what about a single pin @ 10mA, tied to create a short with no external resistor? |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19596
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Posted: Tue Jun 28, 2016 3:20 am |
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It depends on what else the chip is doing. Only you can answer this.
Problem is that if (for instance) you have a couple of pins driving PWM outputs at high speed, the chip could already be dissipating quite a lot of power. |
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asmboy
Joined: 20 Nov 2007 Posts: 2128 Location: albany ny
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Posted: Tue Jun 28, 2016 8:46 am |
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My take is - that if this is indeed a symmetric current source -
than it is possible that with no load -
I'd expect that the programmed value of Iout to be drawn
or at least Iout/2 will be drawn from Vdd + a bit of overhead current too.
Like the classic Howland circuit when it is out of "compliance" range
for instance.
Of more interest is how is this a useful feature ?
The LAST thing i want is a PIC that draws MORE core power.
And really - i wish the NCO, expanded to 24 bits accumulator was in PIC18 land too.
This chip has 15 function blocks.
Yes - a swiss army knife of peripherals built in - but no clear focus of intended application. |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19596
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Posted: Tue Jun 28, 2016 12:03 pm |
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It could be useful for things like rate limiting, but from the description it is not really designed for use as a 'protection' circuit. With the separate enables, it can't really be a traditional symmetrical drive.
To the original poster, _ask Microchip_. You don't want to wait for new data from them. They will give you data almost immediately, on any feature of a chip that is not fully documented. |
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