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Fahim1
Joined: 18 Apr 2016 Posts: 1
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Hardware I2C issue |
Posted: Mon Apr 18, 2016 7:04 am |
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Dear all
I'm working on i2c communication between two micro-controllers using PIC18F87K90. I use the hardware i2c2 module for the communication for both slave and master. But i did not get any char that I'm sending from master to slave and from slave to master. I also check scl line on oscilloscope but did not see any clock generation. The scl and sda, both lines, are pulled up with 4.7k resistor. Please guide me and check my code for both master and slave.
Master code
Code: | #include <main.h>
#include <stdlib.h>
#include <MATH.H>
/*****************UART INATILAZATION OF PIC18F87K90******************/
#use rs232(baud=9600,xmit=pin_c6,rcv=pin_c7,stream=UART1)
#use rs232(baud=9600,xmit=pin_g1,rcv=pin_g2,stream=UART2)
/******************SPI Configuration and modes****************************/
//#define SPI_MODE_0 (SPI_L_TO_H | SPI_XMIT_L_TO_H)
//#define SPI_MODE_1 (SPI_L_TO_H)
//#define SPI_MODE_2 (SPI_H_TO_L)
//#define SPI_MODE_3 (SPI_H_TO_L | SPI_XMIT_L_TO_H)
/***********************************************************************/
#define SLAVE_WRT_ADDR 0x12
#define SLAVE_READ_ADDR 0x13
#define SDI2=PIN_D5
#define SCL2=PIN_D6
#use I2C(MASTER,I2C2,force_hw)
void main()
{
int8 data;
while(1)
{
fprintf(UART2,"INWHILE\r\n");
i2c_start();
i2c_write(SLAVE_WRT_ADDR);
i2c_write('Y');
data = i2c_read();
//SSPBUF2=i2c_read();
// data = i2c_read();
// SSPBUF2=data;
fprintf(uart2,"read %c\n\r",data);
i2c_stop();
delay_ms(1000);
}
} |
slave code
Code: |
#include <main.h>
#include <stdlib.h>
#include <MATH.H>
/*****************UART INATILAZATION OF PIC18F87K90******************/
#use rs232(baud=9600,xmit=pin_c6,rcv=pin_c7,stream=UART1)
#use rs232(baud=9600,xmit=pin_g1,rcv=pin_g2,stream=UART2)
/******************SPI Configuration and modes****************************/
#define SDI2=PIN_D5
#define SCLIN2=PIN_D6
#use I2C(SLAVE,I2C2,force_hw,address=0x12)
int8 rcv;
//int8 adc_result;
//#byte SSPBUF2 = 0xF02 // Register address for 87k90
//#INT_SSP2
//void ssp_interrupt()
//{
//int8 incoming, state;
//state = i2c_isr_state();
// i2c_write('a');
//
////if(state < 0x80) // Master is sending data
//// {
//// incoming = i2c_read();
//// }
////
////if(state >= 0x80) // Master is requesting data from slave
//// {
//// //adc_result = SSPBUF2;
//// //i2c_write(adc_result);
//// i2c_write('a');
////}
// // i2c_write(SSPBUF2);
///*my code
//incoming = i2c_read();
//incoming = rcv;
//incoming = 0;
//fprintf(UART2,"INTSSP2");
//*/
//}
//
void main()
{
// int temp;
// setup_adc(ADC_CLOCK_INTERNAL);
// setup_adc_ports(all_analog,VSS_VDD);
// set_adc_channel(1);
// delay_us(20);
//enable_interrupts(INT_SSP2);
//enable_interrupts(GLOBAL);
fprintf(uart2,"i2cs \r\n");
while(1)
{
// temp=read_adc();
// // adc_result = read_adc();
// fprintf(uart2,"%d \r\n",temp);
// temp=adc_result;
// delay_ms(500);
i2c_start();
rcv=i2c_read();
fprintf(UART2,"%C",rcv);
i2c_write('x');
i2c_stop();
delay_ms(500);
}
} |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Mon Apr 18, 2016 12:59 pm |
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Make the i2c slave using the CCS example file, Ex_slave.c.
Quote: | c:\program files\picc\examples\ex_slave.c |
Edit the #use i2c() line, and also the #include line for the PIC and
the #fuses and #use delay() to fit your project.
Then use the i2c bus scanner program to test if the slave is working.
If it's working, the scanner program will report the slave address.
http://www.ccsinfo.com/forum/viewtopic.php?t=49713
When the Ex_slave.c example is working, then use this Master code
to make your i2c master. Test it with the slave (made from Ex_slave.c).
It should work.
http://www.ccsinfo.com/forum/viewtopic.php?t=32368&start=3 |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19515
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Posted: Mon Apr 18, 2016 2:17 pm |
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and as a comment, understand I2C.
A slave cannot 'start' a transaction. A slave cannot 'stop' a transaction.
In I2C, everything is controlled by the master.
The example shows how the slave has to behave. It receives a 'start'. It receives each byte in turn from the master. The master has to turn the bus round (by issuing a 'restart', followed by the 'read' address). When it sees this, the slave 'preloads' the byte the master can then read on the next transfer.
The master must also NACK the last byte it reads from the slave. This sends the signal to the slave hardware to complete the transaction. |
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