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CCP1 Half bridge waveforms question

 
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peter.rebeiro



Joined: 12 Jan 2016
Posts: 2
Location: mumbai

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CCP1 Half bridge waveforms question
PostPosted: Wed Jan 13, 2016 12:33 am     Reply with quote

Dear all I'm new in this programing.

In my ccp1 half bridge programing I'm getting in my SCOPE waveform result like this:

P1A: ___|--|___
P1B: ----|__|----

but I actually want it like this:

P1A: ____|--|___
P1B: |--|_____|--|___


My humble request is that please help me some one.

my Code is:
Code:

void main()
{
long value,value1;

while( 1 )
  //if (INPUT(PIN_B0)==0)
  {
   setup_ccp1(CCP_PWM_L_H | CCP_PWM_HALF_BRIDGE);
   setup_timer_2(T2_DIV_BY_4,99,1);
   
   setup_adc_ports(AN0_TO_AN1);
   setup_adc(ADC_CLOCK_INTERNAL);
   
   set_adc_channel(1);
   value=read_adc();
   value1=read_adc();
   set_pwm1_duty(value);
  }

}
Ttelmah



Joined: 11 Mar 2010
Posts: 19504

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PostPosted: Wed Jan 13, 2016 2:11 am     Reply with quote

WHAT PIC....

Makes a huge difference to the options available.
peter.rebeiro



Joined: 12 Jan 2016
Posts: 2
Location: mumbai

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CCP1 Half bridge waveforms question
PostPosted: Wed Jan 13, 2016 5:51 am     Reply with quote

Thank you for your attention
The uc ic PIC 18F4520
Ttelmah



Joined: 11 Mar 2010
Posts: 19504

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PostPosted: Wed Jan 13, 2016 8:12 am     Reply with quote

Look at figure 16-2 'PWM output relationships'.

The key point is that the gap between the falling edge of P1A, and the rising edge of P1B, is the bit marked there as 'delay'. This is the 'dead band delay', designed to stop there being a conflict if it takes longer to turn a driver off, than on. So you need to increase this.
This unfortunately is one of those awfully documented things. It has been discussed here before. This is actually the optional parameter in the setup_ccp function.

So:
Code:

setup_ccp1(CCP_PWM_L_H | CCP_PWM_HALF_BRIDGE, 5);


Sets the dead band delay to 5. Try increasing and decreasing the value and you will see the gap between the edges change.
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