View previous topic :: View next topic |
Author |
Message |
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
16F1788: DAC1 out doesn't connect to OPAMP2IN+ [Solved] |
Posted: Sun May 03, 2015 9:18 am |
|
|
Hi All,
I need some help with the opamp of the 16F1788 device.
I'm trying to use OPAMP2 as a buffer for DAC1.
I've set-up OPAMP2 to internally connect to the output of the DAC1.
DAC1 configured to output 2.048V.
Made an external connection between pin B1 (OPA2OUT) and pin B2 (OPA2IN-),
also OPAMP2 configured as a voltage follower.
The output of the DAC is also fed to pin B7, at this pin I measure the correct voltage of 2.048V. But 0 volts at OPA2OUT pin B1.
A simplified schematic:
https://www.dropbox.com/s/5tymhrgw2nwfpao/DAC_OPAMP_setup-gemiddeld.jpg?dl=0
When I configure OPA2IN+ to pin B3 and connect externally to DACOUT2 pin B7 the buffer works fine.
So the internal connection doesn't seem to work. I studied the data sheet and errata sheet over and over but can't find the answer. Sure I'm overlooking something, but can't find out what.
Vdd = 5 Volt.
I wrote a small program to test the configuration:
Code: |
///////////////// ///////////////////////////////////////////////////////
//// DAC_OPAMP_test.c ////
/////////////////////////////////////////////////////////////////////////
#include <16F1788.h>
#device ADC = 12 // ADC returns 12 bit result with sign (= 13 bit).
#FUSES NODEBUG
#FUSES NOMCLR // No Master Clear (Pin assigned to IO).
#FUSES HS //High speed Osc (> 4Mhz for PCM/PCH) (>10Mhz for PCD)
#FUSES PLL_SW
#FUSES NOWDT //No Watch Dog Timer
#FUSES NOFCMEN //Fail safe clock monitor disabled
#use delay(clock=8M)
// The output of the DAC1 is fed into the internal buffer OPAMP2.
// OPA2IN- (B2) externally connected to OPA2OUT (B1)
void main()
{
// DAC setup -------------------------------------------
// Vref+ to Vref- = 4.096V external.
// Fixed 2.048V to OPAMP2.
setup_dac(DAC_VREF_VREF | DAC_OUTPUT2);
dac_write(128); // Fixed 2.048V out.
// Opamp2 setup -------------------------------------------
// Remark: 16F1788.h contains defines:
// #define OPAMP_I_TO_OUTPUT 0x10 // Inverting input connects to OPAxOUT,
// according to the datasheet not available for this device.
// #define OPAMP_LOW_GBWP_MODE 0x00
// Opamp in low gain bandwidth mode NOT permitted! See datasheet.
setup_opamp2(OPAMP_ENABLED | OPAMP_NI_TO_DAC | OPAMP_HIGH_GBWP_MODE);
while(TRUE) // Just wait......
{
delay_ms(1000);
}
}
|
Thanks in advance!
Cheers,
Arend
Last edited by AHE on Tue May 05, 2015 5:29 am; edited 1 time in total |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19488
|
|
Posted: Sun May 03, 2015 9:29 am |
|
|
Hurrah!... Almost a perfect question. Example code, and details of your problem.
9/10. The missing point is for one thing _what compiler version_?.
We need to know, so we can test and see if something is not being configred correctly by your version. |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Sun May 03, 2015 12:25 pm |
|
|
Hi Mr T.,
Thank you for the fast reply and the compliment .
Compiler version is 5.045.
Thanks,
Arend |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Sun May 03, 2015 12:38 pm |
|
|
Hi Mr. T.,
When I have a look at the list file it looks like the Opamp/DAC being configured ok. So it is still a mystery to me.
Code: |
CCS PCM C Compiler, Version 5.045, xxxxx 03-mei-15 13:46
Filename: D:\DAC_OPAMP_test.lst
ROM used: 50 words (0%)
Largest free fragment is 2048
RAM used: 6 (0%) at main() level
18 (1%) worst case
Stack used: 0 locations
Stack size: 16
*
0000: MOVLP 00
0001: GOTO 019
0002: NOP
.................... ///////////////// ///////////////////////////////////////////////////////
.................... //// DAC_OPAMP_test.c ////
.................... /////////////////////////////////////////////////////////////////////////
.................... #include <16F1788.h>
.................... //////////// Standard Header file for the PIC16F1788 device ////////////////
.................... ///////////////////////////////////////////////////////////////////////////
.................... //// (C) Copyright 1996, 2014 Custom Computer Services ////
.................... //// This source code may only be used by licensed users of the CCS C ////
.................... //// compiler. This source code may only be distributed to other ////
.................... //// licensed users of the CCS C compiler. No other use, reproduction ////
.................... //// or distribution is permitted without written permission. ////
.................... //// Derivative programs created using this software in object code ////
.................... //// form are not restricted in any way. ////
.................... ///////////////////////////////////////////////////////////////////////////
.................... #device PIC16F1788
....................
.................... #list
....................
.................... #device ADC = 12 // ADC returns 12 bit result with sign (= 13 bit).
.................... #FUSES NODEBUG
.................... #FUSES NOMCLR // No Master Clear (Pin assigned to IO).
.................... #FUSES HS //High speed Osc (> 4Mhz for PCM/PCH) (>10Mhz for PCD)
.................... #FUSES PLL_SW
.................... #FUSES NOWDT //No Watch Dog Timer
.................... #FUSES NOFCMEN //Fail safe clock monitor disabled
.................... #use delay(clock=8M)
0003: MOVLW 20
0004: MOVWF 05
0005: MOVLW 02
0006: MOVWF 04
0007: MOVF 00,W
0008: BTFSC 03.2
0009: GOTO 017
000A: MOVLW 02
000B: MOVWF 78
000C: CLRF 77
000D: DECFSZ 77,F
000E: GOTO 00D
000F: DECFSZ 78,F
0010: GOTO 00C
0011: MOVLW 97
0012: MOVWF 77
0013: DECFSZ 77,F
0014: GOTO 013
0015: DECFSZ 00,F
0016: GOTO 00A
0017: MOVLP 00
0018: GOTO 02D (RETURN)
....................
....................
.................... // The output of the DAC1 is fed into the internal buffer OPAMP2.
.................... // OPA2IN- (B2) externally connected to OPA2OUT (B1)
....................
....................
.................... void main()
0019: MOVLB 03
001A: CLRF 0C
001B: CLRF 0D
001C: CLRF 0E
001D: MOVLB 02
001E: CLRF 12
001F: CLRF 11
.................... {
.................... // DAC setup -------------------------------------------
.................... // Vref+ to Vref- = 4.096V external.
.................... // Fixed 2.048V to OPAMP2.
.................... setup_dac(DAC_VREF_VREF | DAC_OUTPUT2);
0020: MOVLW 95
0021: MOVWF 18
.................... dac_write(128); // Fixed 2.048V out.
0022: MOVLW 80
0023: MOVWF 19
....................
.................... // Opamp2 setup -------------------------------------------
.................... // Remark: 16F1788.h contains defines:
.................... // #define OPAMP_I_TO_OUTPUT 0x10 // Inverting input connects to OPAxOUT,
.................... // according to the datasheet not available for this device.
....................
.................... // #define OPAMP_LOW_GBWP_MODE 0x00
.................... // Opamp in low gain bandwidth mode NOT permitted! See datasheet.
....................
.................... setup_opamp2(OPAMP_ENABLED | OPAMP_NI_TO_DAC | OPAMP_HIGH_GBWP_MODE);
0024: MOVLW C2
0025: MOVLB 0A
0026: MOVWF 13
....................
.................... while(TRUE) // Just wait......
.................... {
.................... delay_ms(1000);
0027: MOVLW 04
0028: MOVLB 00
0029: MOVWF 21
002A: MOVLW FA
002B: MOVWF 22
002C: GOTO 003
002D: DECFSZ 21,F
002E: GOTO 02A
002F: MOVLB 0A
0030: GOTO 027
.................... }
.................... }
0031: SLEEP
Configuration Fuses:
Word 1: 1F82 HS NOWDT PUT NOMCLR NOPROTECT NOCPD BROWNOUT NOCLKOUT IESO NOFCMEN
Word 2: 1E23 NOWRT NOVCAP PLL_SW STVREN BORV19 NOLPBOR NODEBUG NOLVP
|
Cheers,
Arend |
|
|
PCM programmer
Joined: 06 Sep 2003 Posts: 21708
|
|
Posted: Tue May 05, 2015 1:36 am |
|
|
Do you still need help on this ? If so, I could order one of these PICs
and attempt to make it work. |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Tue May 05, 2015 2:08 am |
|
|
Hi PCM_Programmer,
Thank you for your reply. Yes, I still need help on this. For the time being I created a work around by defining OPA2IN+ to pin B3 and than hard wiring the DAC1OUT2 output pin B7 to pin B3. That works fine but I am anxious to know why the internal connection between OPA2IN+ and DAC1OUT2 doesn't work (in my project). And in the future I need pin B7 for other purposes.
I hope that I made a mistake and that it isn't a compiler issue or, even worse, a chip issue. The latter I can't imagine because there is nothing about it in the errata sheet.
Thanks!
Cheers,
Arend _________________ Current compiler version: PCWHD v5.048 |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19488
|
|
Posted: Tue May 05, 2015 3:33 am |
|
|
Try this:
Code: |
///////////////// ///////////////////////////////////////////////////////
//// DAC_OPAMP_test.c ////
/////////////////////////////////////////////////////////////////////////
#include <16F1788.h>
#device ADC = 12 // ADC returns 12 bit result with sign (= 13 bit).
#FUSES NODEBUG
#FUSES NOMCLR // No Master Clear (Pin assigned to IO).
#FUSES HS //High speed Osc (> 4Mhz for PCM/PCH) (>10Mhz for PCD)
#FUSES PLL_SW
#FUSES NOWDT //No Watch Dog Timer
#FUSES NOFCMEN //Fail safe clock monitor disabled
#use delay(clock=8M)
// The output of the DAC1 is fed into the internal buffer OPAMP2.
// OPA2IN- (B2) externally connected to OPA2OUT (B1)
#define OPAMP_NI_TO_DAC1 4
#define OPAMP_NI_TO_DAC2 5
#define OPAMP_NI_TO_DAC3 6
#define OPAMP_NI_TO_DAC4 7
void main()
{
// DAC setup -------------------------------------------
// Vref+ to Vref- = 4.096V external.
// Fixed 2.048V to OPAMP2.
setup_dac(DAC_VREF_VREF | DAC_OUTPUT2);
dac_write(128); // Fixed 2.048V out.
// Opamp2 setup -------------------------------------------
// Remark: 16F1788.h contains defines:
// #define OPAMP_I_TO_OUTPUT 0x10 // Inverting input connects to OPAxOUT,
// according to the datasheet not available for this device.
// #define OPAMP_LOW_GBWP_MODE 0x00
// Opamp in low gain bandwidth mode NOT permitted! See datasheet.
setup_opamp2(OPAMP_ENABLED | OPAMP_NI_TO_DAC1 | OPAMP_HIGH_GBWP_MODE);
while(TRUE) // Just wait......
{
delay_ms(1000);
}
}
|
I compiled your code, and checked what was being selected. For what you want (Non-inverting input connects to DAC1_output), the OPA2CH bits need to be 4. The compiler is not offering that as an option.
Created the option, and re-compiled, and the bits are then correctly configured, so it should work.
They seem to have forgotten four of the possible selections in the include file for the processor. Inform CCS.
As a comment, you say that "Opamp in low gain bandwidth mode NOT permitted! See datasheet". Yet there seems to be no such reference in the sheet. In fact the low gain mode, is the default. What doesn't support the low power mode is the _comparator_, which has an erratum for this. |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Tue May 05, 2015 5:28 am |
|
|
Hi Mr. T.,
Thank you for your time!
I tried your example code and it DOES work! But according to my data sheet it shouldn't. I downloaded this data sheet just a couple of days ago.
Thus I downloaded the data sheet again and yes, the one I used was totally wrong about the OPA module(s). The 'new' data sheet mentions a lot more options to choose from and 3 bits of the OPAxCON register are involved in stead of 2. Sure that CCS also used the incorrect one!
The remark about the Low_Gain_Band_Width proves to be not applicable to this device either.
I'll inform CCS to revise the header file according to the latest data sheet.
Thanks again!
Cheers,
Arend
_________________ Current compiler version: PCWHD v5.048 |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19488
|
|
Posted: Tue May 05, 2015 7:03 am |
|
|
Interesting!...
Glad it worked. I did the 'sit down with sheet', calculated what I'd expect to be in the registers, ran the code under MPLAB SIM, and then looked at what was happening.
Different sheet versions would explain a lot. There are some PIC's where there are three or four different versions. However the one I have is one I pulled down quite a while ago!. Does the old sheet have the same actual 'sheet number'?. 41675A?. There is a DS41675.pdf, but the A version came out nearly 2 years ago!.
A quick search shows a couple of European educational sites holding the 'non A' sheet. Lesson, always go to Microchip themselves... |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Tue May 05, 2015 7:58 am |
|
|
Hi Mr. T.,
It becomes even more interesting:
In first instance I used version DS40001675B dated 03/25/14 of the data sheet. I'm sure I downloaded this version from Microchip themselves....
The one I downloaded today from Microchip is version DS41675A dated 11/29/12, the one you used too.
It looks like Microchip withdrew the erroneous 'B' version and replaced it with the older 'A' version........
In my case I used the latest data sheet but that didn't help.... It is wrong, at least for the OPAMP part.
Without your help I was probably still struggling with this issue. That makes your help priceless
Cheers,
Arend _________________ Current compiler version: PCWHD v5.048 |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19488
|
|
Posted: Tue May 05, 2015 8:15 am |
|
|
Yes. It gets more interesting.....
I've just experimented. Two different routes at MicroChip, and one gives the B sheet, the other the A!...
No mention in the errata of perhaps chip version numbers relating to different sheets. Aargh.
The CCS code is for the B version sheet, but the data sheet reference in the device editor, is to the A sheet.
Can you pull the DEVREV value using your programmer?. Location 8005 in the memory. The B sheet is for revisions B0/B1 of the chip. Guessing the A sheet is for revision A versions of the chip. B0/B1 are 2040 & 2041 in the DEVREV. If yours doesn't have this value, it'd suggest it is an A version chip. Possibly withdrawn!... |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Wed May 06, 2015 1:21 pm |
|
|
Hi Mr. T.,
Sorry for the delay. Have to cope with some deadlines
I always use the ICD-U64 programmer but I don't know how to extract the Dev Rev with this tool (do you know?). So I used the mplab icd3 and:
MPLAB ICD 3 detected
Connecting to MPLAB ICD 3...
Running self test...
Self test completed
Firmware Suite Version...... 01.28.90
Firmware type......................PIC18FJ
Downloading AP...
AP download complete
Running self test...
Self test completed
Firmware Suite Version...... 01.28.90
Firmware type......................Enhanced Midrange
MPLAB ICD 3 Connected.
Target Detected
Device ID Revision = 00000000
No revision level (or level 0), a non existent part?
Do you have an explanation or is it just an old 0 revision device?
Very interesting indeed.
Cheers,
Arend _________________ Current compiler version: PCWHD v5.048 |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Wed May 06, 2015 1:27 pm |
|
|
I reread your latest post stating with no dev rev it could be an A revision device.
I will order this device from another supplier to see what dev rev level I will get.
Will take a few days, to be continued.............
Cheers,
Arend _________________ Current compiler version: PCWHD v5.048 |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19488
|
|
Posted: Wed May 06, 2015 1:33 pm |
|
|
This has come up before. The revision returned by the ICD-U64 on some chips isn't right....
Write a program, that uses the 'read_configuration_memory function. Then output the bytes from this. |
|
|
AHE
Joined: 22 Jul 2009 Posts: 10 Location: Renswoude, The Netherlands
|
|
Posted: Wed May 06, 2015 4:03 pm |
|
|
I used the mplab ICD3 to retrieve the revision. Has this unit the same issue as the ICD-U64? _________________ Current compiler version: PCWHD v5.048 |
|
|
|