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How can I enable interrupts when the program is in an int???

 
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stoyanoff



Joined: 20 Jul 2011
Posts: 375

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How can I enable interrupts when the program is in an int???
PostPosted: Sat Nov 22, 2014 10:02 am     Reply with quote

Greatings! I`m using dsPIC30F5015, MPLab v 8.91 and CCS v5.025. I have a small problem with the interrupts. I`m using 3 interrupts - #INT_PWM1, #INT_FAULTA and #INT_FAULTB. The problem is when the program is in #INT_PWM1(I haven`t checked for the others yet), INT_FAULTA and INT_FAULTB are desabled! This is a problem because I`m doing a few calculations in the PWM interrupt and my pcb is unprotected through this time! So how can I turn on (enable) this interrupts when I`m in #INT_PWM1.
I`ve tried to add
enable_interrupts(INT_FAULTA);
enable_interrupts(INT_FAULTB);
but it doesn`t work!
Example:
Code:

#INT_PWM1
void SetPvm()
{
        enable_interrupts(INT_FAULTA);
   enable_interrupts(INT_FAULTB);

        //calculations...
}

Adding ENABLE_INTERRUPTS(INTR_GLOBAL); causes cpu reset!
Help, please! This is a serious problem!
Thanks!
Mike Walne



Joined: 19 Feb 2004
Posts: 1785
Location: Boston Spa UK

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PostPosted: Sat Nov 22, 2014 12:25 pm     Reply with quote

You're using a PIC I am not familiar with so I ask the question:-

Does your PIC have more than interrupt priority level?
If the answer is yes, then you should be able to solve the problem.

Otherwise find a way to speed up #INT_PWM1.
(Set a flag only and do the maths in main.)

Mike
stoyanoff



Joined: 20 Jul 2011
Posts: 375

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PostPosted: Sat Nov 22, 2014 12:46 pm     Reply with quote

I think so! I have INTR_LEVEL0 to INTR_LEVEL7 settings in the header. I also tried #INT_FAULTA HIGH and the complier accepted it! Can you tell me how to set this priorities?
Thanks!
Ttelmah



Joined: 11 Mar 2010
Posts: 19520

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PostPosted: Sat Nov 22, 2014 12:57 pm     Reply with quote

Mike is right.

Interrupts _aren't_ disabled. What is happening, is that by default all interrupts are at the same priority level.

There are eight interrupt levels, on the DsPIC's. The highest is normally reserved for certain fault conditions.

Look at
#INT_xxx (whatever interrupt you want) level=x
as the interrupt declaration.

Read the data sheet for how the levels 'work', and then assign the levels to you interrupts.
You can also disable and enable specific levels using:
enable_interrupts(INTR_LEVEL5);

as an example.
stoyanoff



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Posts: 375

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PostPosted: Sun Nov 23, 2014 1:44 am     Reply with quote

Hi, again! This is not working, too. I`ve tried to assign different priority levels to my ITNs without any success.
If we assume level 7 is the highest priority:
Code:

#INT_PWM1 level=5
{
}

#INT_FAULTB level=7
{
}

void main()
{
 //code
        ENABLE_INTERRUPTS(INTR_GLOBAL);
        enable_interrupts(INT_PWM1);
        enable_interrupts(INT_FAULTB);
   enable_interrupts(INTR_LEVEL5);
   enable_interrupts(INTR_LEVEL7);
}


If we assume level 0 is the highest priority:
Code:

#INT_PWM1 level=7
{
}

#INT_FAULTB level=0
{
}

void main()
{
 //code
        ENABLE_INTERRUPTS(INTR_GLOBAL);
        enable_interrupts(INT_PWM1);
        enable_interrupts(INT_FAULTB);
   enable_interrupts(INTR_LEVEL0);
   enable_interrupts(INTR_LEVEL7);
}

In the both ways when I`m in the INT_PWM1 fault interrupt is NOT triggered until the all calculation in the PWM1 are done.
Am I doing anything wrong? Do I have to use this INTR_LEVEL0 directives?
Thanks!
Ttelmah



Joined: 11 Mar 2010
Posts: 19520

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PostPosted: Sun Nov 23, 2014 2:17 am     Reply with quote

As I said, you _must_ read the data sheet for this. Just trying things is not a good place to start. Get document 70053D from Microchip. Then leave the PWM interrupt where it is, and just raise the fault interrupt by one level.
Look in the manual at #DEVICE. What does 'NESTED_INTERRUPTS=TRUE' do?.

Code:

//Near top of code with other device statements:
#DEVICE NESTED_INTERRUPTS=TRUE

//then declare as:
#INT_PWM1
{
}

#INT_FAULTB level=5
{
}

void main()
{
 //code
        ENABLE_INTERRUPTS(INTR_GLOBAL);
        enable_interrupts(INT_PWM1);
        enable_interrupts(INT_FAULTB);
}

Level0, effectively disables the interrupt.
Level7, makes the interrupt so it can't be disabled by DISI.
Level4, is the default level.
stoyanoff



Joined: 20 Jul 2011
Posts: 375

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PostPosted: Sun Nov 23, 2014 8:13 am     Reply with quote

Thanks, Ttelmah! I wan`t familiar with #DEVICE NESTED_INTERRUPTS=TRUE directive. I`ve tried with #DEVICE HIGH_INTS=TRUE, but the compiler return Error 104 "master.c" Line 3(9,24): Extra characters on preprocessor command line. So I assumed there was no need of this directive. It`s working now correctly. Thanks!
Ttelmah



Joined: 11 Mar 2010
Posts: 19520

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PostPosted: Sun Nov 23, 2014 9:52 am     Reply with quote

It is an area where CCS is very unclear. The manual is trying to cover 16/18/24 etc. chips and does not make clear which instructions apply to which.
This just enables the bit in the processor to allow interrupt nesting.
If you start with the Microchip interrupt manual, this is mentioned, and if you then search for 'nesting' in the CCS manual, the answers start to click.
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