Different Clock Speeds with 2pics and SPI

[carl]

Hi There,

Will I have any problems in using SPI between two different pics - each with a seperate oscillator at different speeds?

Thanks

[Ttelmah]

Basically, no.

SPI is synchronous, so the master controls the timing.

However the slave actually has to do more work (generally going into an IRQ), so it may well be necessary to pause after sending bytes from the master, especially if this is the faster chip.

Best Wishes

[asmboy]

If you want maximum efficiency for hardware unidirectional SPI transfers
AND you can spare an extra IO pin on each pic -
semaphore your receipt of each 8 bits by toggling a pin output state when the transfer is complete.

The sender simply records the INPUT state of its semaphore receive pin
before executing the write_spi() and then loops while looking for the pin to change state.

The receiving pic, upon receipt of the most recent byte,doing any essential processing that the byte might require - next toggles the output semaphore pin that It controls. This will assure that even with very
mismatched PIC clock rates - and possible extra receiver overhead-
that you are safe to send.

Monitoring the send spi buffer alone won't assure safe receipt.

[carl]

Superb answers as usual,

Thank-you both.

Carl