 |
 |
| View previous topic :: View next topic |
| Author |
Message |
epalite
Joined: 06 Apr 2008
Posts: 16
|
| FUSES HSM and external crystal on 66k80 |
 Posted: Thu Dec 13, 2012 8:48 am |
 |
|
Hi,
I am trying to get a 16MHz from an external 4MHz crystal with 4x PLL, however, I seem to be having internal OSC to be driving instead. I read in this forum about the internal OSC will switch over if external didn't get to work.
I put into FUSES the HSM declaration, however, the compiler generated a config word with INTRC_HP XT (see LST below) which I don't think is right.
Anyone can clarify? Thanks!
Source:
| Code: | #include <18F66K80.h>
#fuses HSM, PLLEN
#use delay(crystal=4M, clock=16M)
void main() {
}
|
LST file:
| Code: |
CCS PCH C Compiler, Version 4.132, 64552 13-Dec-12 22:39
00000: GOTO main
.................... #include <18F66K80.h>
.................... //////// Standard Header file for the PIC18F66K80 device ////////////////
.................... #device PIC18F66K80
.................... #list
....................
....................
.................... #fuses HSM, PLLEN
....................
.................... #use delay(crystal=4M, clock=16M)
....................
.................... void main() {
00004: CLRF TBLPTRU
00006: BCF RCON.IPEN
00008: CLRF FSR0H
0000A: CLRF FSR0L
0000C: MOVLB 1
0000E: CLRF x88
00010: MOVLB F
00012: MOVF x5C,W
00014: ANDLW 80
00016: MOVWF x5C
00018: MOVLW 00
0001A: MOVWF x5D
0001C: BCF ADCON1.VNCFG
0001E: BCF ADCON1.VCFG0
00020: BCF ADCON1.VCFG1
00022: CLRF x5E
00024: CLRF x5F
.................... }
00026: BRA 0026
Configuration Fuses:
Word 1: 511D VREGSLEEP INTRC_HP SOSC_HIGH NOXINST XT PLLEN FCMEN NOIESO
Word 2: 3469 NOPUT NOBROWNOUT BORV27 ZPBORM NOWDT WDT8192
Word 3: 8F00 CANB T0CKB5 T3CKG2 MSSPMSK7 MCLR
Word 4: 0010 NOSTVREN BBSIZ2K DEBUG
Word 5: C00F NOPROTECT NOCPB NOCPD
Word 6: E00F NOWRT NOWRTC NOWRTB NOWRTD
Word 7: 400F NOEBTR NOEBTRB |
|
|
 |
Ttelmah
Joined: 11 Mar 2010
Posts: 19346
|
|
| Posted: Thu Dec 13, 2012 9:47 am |
|
|
Several things.
First XT, is considered the correct mode for a normal 4MHz crystal. HSH, is for crystals over 16MHz, or for the PLL. HSM, for 4M to 16M, with the option of the PLL. Because of your 'crystal' entry in the clock statement, the compiler is overriding the HSM fuse (Duh...). I'd always use ''one or the other', so just put a CLOCK entry in the clock statement, and configure the fuses yourself. If you do this, you will find HSM _is_ selected OK.
Then, these chips _cannot_ start on the crystal. From the data sheet:
"Regardless of which primary oscillator is selected,
INTOSC will always be enabled on device power-up. It
serves as the clock source until the device has loaded
its configuration values from memory. It is at this point
that the FOSCx Configuration bits are read and the
oscillator selection of the operational mode is made."
The internal oscillator is needed for things like the watchdog, so the compiler enables it. However it defaults to enabling high power mode for this oscillator. For lower power, explicitly change this to INTRC_LP if required.
Now, what oscillator is used, once running and the PLL, are controlled by the bits FOSC<3:0>, and PLLCFG. You want 0011 for the former, and '1' for the latter. These are the bottom five bits of Config1H. You want 10011.
If you compile with:
| Code: |
#include <18F66K80.h>
#fuses HSM, PLLEN
#use delay(clock=16M)
void main() {
}
|
And look at these bits:
| Code: |
Word 1: D315 VREGSLEEP INTRC_HP SOSC_DIG NOXINST HSM PLLEN FCMEN IESO
|
0xD3 = 1101 0011
as required.
The only reason it'd stay running on the internal oscillator in this case, is if the primary doesn't start. If you setup_oscillator, it returns a value, which contains '8' if the primary oscillator is running.
Best Wishes |
|
|
epalite
Joined: 06 Apr 2008
Posts: 16
|
|
| Posted: Thu Dec 13, 2012 11:50 pm |
|
|
Thanks!
I found that in order for me to use RC0/1 as IO, I need to add SOSC_DIG to the FUSES statement, otherwise, RC0/1 might be redefined (see data sheet "If a secondary oscillator is not desired and digital I/O on
port pins, RC0 and RC1, is needed, the SOSCSELx
bits must be set to Digital mode.").
Source:
| Code: | | #fuses HSM, PLLEN, CANE, SOSC_DIG |
LST:
| Code: | | Word 1: 5315 VREGSLEEP INTRC_HP SOSC_DIG NOXINST HSM PLLEN FCMEN NOIESO |
|
|
|
|
|
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum
|
Powered by phpBB © 2001, 2005 phpBB Group
|
FAQ 
Search
Register
Profile 
Log in to check your private messages 
Log in
