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Tom-H-PIC
Joined: 08 Sep 2003 Posts: 105 Location: New Castle, DE
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ADC clock period TAD for the PIC18F26K22 |
Posted: Wed Feb 22, 2012 7:05 am |
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Ok this ADC clock and TAD thing with the PIC controllers has always confused me.
Ok I have search the forum and read all I can find on ADC TAD.
I just want to make sure that I understand TAD correctly and need some conformation of that is all.
I'm using the PIC18F26K22
Internal oscillator of 8Mhz and PLL fuse set for a FOSC of 32Mhz.
In looking at the data sheet table 17-1 it looks like the minimum TAD for full conversion is 1.0us?
So from the table and my FOSC of 32 I would use an ADC clock of FOSC/32?
This would give me a TAD time of 1us?
So ADC requires 11 TAD cycles for a 10 bit conversion so that equals 11us for one full 10 bit ADC reading?
Now add the TAQT time of 4us and the discharge time of 2us that give use a total ADC tome of 17us?
If the above is correct.
The max ADC speed of 58.8Khz ignoring code overhead.
So if I code a loop to read the ADC 50 time the program would delay at that location for 50x17us=850us ignoring code overhead?
Thanks for all you input in advance!
Tom |
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RF_Developer
Joined: 07 Feb 2011 Posts: 839
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Re: ADC clock period TAD for the PIUC18F26K22 |
Posted: Wed Feb 22, 2012 7:44 am |
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Tom-H-PIC wrote: |
I'm using the PIC18F26K22
Internal oscillator of 8Mhz and PLL fuse set for a FOSC of 32Mhz.
In looking at the data sheet table 17-1 it looks like the minimum TAD for full conversion is 1.0us?
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Yes. Most 16 and 18 series PICs work at this speed. Some a little faster, some a little slower, but we could say the standard 8/10 bit ADC block used by Microchip is clocked at 1MHz.
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So from the table and my FOSC of 32 I would use an ADC clock of FOSC/32?
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Yes.
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This would give me a TAD time of 1us?
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Yes.
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So ADC requires 11 TAD cycles for a 10 bit conversion so that equals 11us for one full 10 bit ADC reading?
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Yes.
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Now add the TAQT time of 4us and the discharge time of 2us that give use a total ADC tome of 17us?
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Hmm, the worked example in the data sheet (41412E) suggests that we should allow something like 7.5us for Tacq. I'm not sure what you mean by "discharge time". I'd suggest waiting 8us, preferably by setting ACTQ to 8, or TAD_8_MUL in CCS speak. This makes the hardware wait 8 TAD periods before sampling, allowing you to select a channel and then immediately follow it with the start of a conversion. I make the total 19us, but call it 17us if you fell that's OK.
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If the above is correct.
The max ADC speed of 58.8Khz ignoring code overhead.
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Yes... but code overhead is very significant and hard to ignore in practise.
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So if I code a loop to read the ADC 50 time the program would delay at that location for 50x17us=850us ignoring code overhead?
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Yes for short bursts. That's assuming you are not doing anything with the data and there are no interrupts. You can do something with the result if you start the conversion, continue with processing while the ADC is converting, and then read the data and then triggering the next conversion. Also your conversion rate is not fully fixed. Interrupts can, and will lengthen some loops. Any processing may introduce timing changes: jitter. In short using such a software controlled ADC conversion loop has many problems. If you want to convert at a known and fixed, reliable interval, and MOST useful applications require it, then you're going to have to use special event triggering at a somewhat slower rate and poll or use interrupt on ADC DONE to recover the data. You can sensibly convert bursts of data at fixed rates the software only way by turning off interrupts and carefully coding to make sure all code between conversions is guaranteed to be the same length; which pretty much means no ifs.
RF Developer |
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Tom-H-PIC
Joined: 08 Sep 2003 Posts: 105 Location: New Castle, DE
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Posted: Thu Feb 23, 2012 7:49 am |
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Thanks
RF_Developer for clarifying all this for me.
Tom |
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