dsPIC: Trouble getting ASM load/modify/store working

icefield · Joined: 09 May 2005 Posts: 20 Location: Canada

The C code below compiles to 6 or 11 instructions for a load/modify/store and this is a time-sensitive operation. Instead, I want to do it with 4 instructions in assembly. But, for some reason, I cannot get CCS (4.112) to generate the elusive MOV.B W0L,2D4. Presumably this is coded as MOV.B W0, REG_PORTD_LSB, but the compiler generates an "Expecting an opcode mnemonic" error.

FvM · Joined: 27 Aug 2008 Posts: 2337 Location: Germany

Don't know why PCD assembler refuses to translate legal asm syntax arbitrarily. My solution is to use register variables in C code, either together with assembler instructions, or without it, as shown below:

icefield · Joined: 09 May 2005 Posts: 20 Location: Canada

Most excellent! It works.

Now, if CCS would just get their inline assembler to accept legal mnemonics, we'd be spared this bother! It boggles my mind that the compiler can generate the very instructions it refuses to parse.

Many thanks.

Ttelmah · Joined: 11 Mar 2010 Posts: 19328

The question is "who's" legal mnemonics?....

CCS assembler, is not Microchip assembler. They have their own syntax, that is nearer to C in a lot of places. The big problem is not that it doesn't accept other people's mnemonics, but that they don't document what it does accept.... Crying or Very sad

It really calls for a separate assembler pdf, with details of the accepted instructions for PCM (most known), PCH (ditto), and PCD (still large gaps...), and syntax details for things like accessing addresses etc..

However, it has become less and less necessary, with 98% of stuff that used to require assembler, now being directly do-able in the C.

Best Wishes

RenSeven · Joined: 28 Oct 2010 Posts: 5

FvM · Joined: 27 Aug 2008 Posts: 2337 Location: Germany

RenSeven · Joined: 28 Oct 2010 Posts: 5

Not sure what conclusions you think I'm jumping to. I found this thread because I am trying to assemble the same mnemonics and getting the same error codes as the OP. So I guess I did compile the said code myself. I believe Ttelmah's point was that CCS uses their own mnemonics, and I simply pointed out that their help file ironically claims they use Microchip's mnemonics.

FWIW (thanks to DR @ CCS support) the (or a) correct syntax is:

FvM · Joined: 27 Aug 2008 Posts: 2337 Location: Germany

Sorry for misinterpreting your statement. Others should decide, if it can be easily understood as an ironic comment about the confuse CCS documentation.

It seems to me, that the piece of information given in the laconic FWIW would be much more worth a posting than your first cryptic attempt.

I basically agree to your conclusion:

Ttelmah · Joined: 11 Mar 2010 Posts: 19328

First, CCS's error messages have little to do with real errors. If you have used the compiler for a while, you will have found that 90% of the time, the error message actually doesn't reflect where the real error lies...

Now, the point about the CCS assembler, is that it's 'core syntax', is not Microchip. Unfortunately, this syntax is almost completely undocumented. The manual section is a joke, and most of the more sophisticated constructs have been discovered by past experimentation, hints from CCS etc..
As you see from what you have now found to be the correct syntax, it was not the actual mnemonic that was the problem, but the syntax of the line after it, with CCS 'implying' W0, without having to be told.

Let's all start to ask for better documentation here. Whenever an answer like the one you now have is given, 'ask back' for better documentation. Eventually, someone at CCS may actually listen.

Best Wishes