CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to support@ccsinfo.com

24FJ64002 FRC trouble

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
Rohit de Sa



Joined: 09 Nov 2007
Posts: 282
Location: India

View user's profile Send private message Visit poster's website

24FJ64002 FRC trouble
PostPosted: Thu Sep 23, 2010 3:09 am     Reply with quote

Hi everyone,

I'm using a 24FJ64GA002 with its internal fast RC oscillator. My problem is that the clock frequency (as measured on OSCO/pin10) is half the frequency it should be. My fuses:
Code:
#fuses FRC_PLL, NOWDT
#fuses NOJTAG, NOPROTECT, NOWRT, NODEBUG, NOCKSFSM
#fuses NOOSCIO, NOIESO
#use delay(clock=32000000)
As per the fuses and the datasheet, I should see
Code:
(FRC=8MHz)*(4xPLL)/2=16MHz
on OSCO. Throwing a scope onto the pin shows me only 8MHz.



The datasheet tells me that RCDIV0 (bit 8) in register CLKDIV (0x0744) defaults to 1. So I got around this issue by using this in my code:
Code:
#word CLKDIV = 0x0744
.
.
CLKDIV=0;
Now I see a 16MHz clock on OSCO. But there must be a more elegant way to do this. What surprises me is the fact that the postscaler is 'engaged' in the first place. The datasheet (and the CCS fuse descriptions) gave me the impression that the postscaler block is by-passed when FRC_PLL is selected. Maybe my fuses are messed up.

Additionally, I can't seem to find any fuses to set the exact FRC postscaler ratio - there's just "FRC_PS". How do I set the ratio (other than doing it the way I adjusted RCDIV0.

MPLAB v8.30 / PCD v4.104

Rohit
FvM



Joined: 27 Aug 2008
Posts: 2337
Location: Germany

View user's profile Send private message

PostPosted: Thu Sep 23, 2010 6:46 am     Reply with quote

Quote:
The datasheet (and the CCS fuse descriptions) gave me the impression that the postscaler block is by-passed when FRC_PLL is selected.

Figure 7-1 clock diagram shows the opposite, I think.

Quote:
I can't seem to find any fuses to set the exact FRC postscaler ratio
Look at the configuration bits section in the datasheet - there are none. CLKDIV has to be setup in most cases to achieve the intended clock parameters. PCD #use delay is doing this partly, but I'm not sure with GA002 chip. Possibly an extended syntax like #use delay (oscillator=8Mhz, clock=32Mhz) is required. But I would always check the CLKDIV setting done by the compiler.
Rohit de Sa



Joined: 09 Nov 2007
Posts: 282
Location: India

View user's profile Send private message Visit poster's website

PostPosted: Thu Sep 23, 2010 7:01 am     Reply with quote

Quote:
Possibly an extended syntax like #use delay (oscillator=8Mhz, clock=32Mhz) is required
Bingo! The exact code is:
Code:
#use delay (internal=8Mhz, clock=32Mhz)
Thanks!

Rohit
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group