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rlaj
Joined: 19 Aug 2009
Posts: 1
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| 33FJ128GP804 & DAC |
 Posted: Wed Aug 19, 2009 5:09 am |
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Hello,
I am using the dsPIC 33FJ128GP804 and PCD 4.089. I have some problems working on the DAC.
A summary of my code is:
| Code: |
...
#word DAC1CON = 0x03F0
#word DAC1STAT = 0x03F2
#word DAC1DFLT = 0x03F4
#word DAC1RDAT = 0x03F6
#word DAC1LDAT = 0x03F8
#define DAC_ON 0x00008000
#define DAC_OFF 0
#define DAC_RIGHT_ON 0x00808000
#define DAC_LEFT_ON 0x80008000
#define DAC_LEFT_MIDPOINT 0xA0008000
#define DAC_RIGHT_MIDPOINT 0x00A08000
#define DAC_SIGNED 0x00000100
#define DAC_SLEEP_ON 0x00001000
#define DAC_IDLE_OFF 0x00002000
#define DAC_CLOCK_DIV_BY_1 0x00000000
...
void DACSetup(int32 regist, int16 def=0){
output_drive(PIN_B12); //outputs
output_drive(PIN_B13);
output_drive(PIN_B14);
output_drive(PIN_B15);
output_drive(PIN_C0); //DAC1RM
DAC1DFLT = def; //default value set to Midpoint
DAC1CON = (int16)(regist);
DAC1STAT = (int16)(regist >> 16);
}
void main(){
int16 i=0x8000;
DACSetup(DAC_RIGHT_ON | DAC_RIGHT_MIDPOINT | DAC_SIGNED | DAC_SLEEP_ON | DAC_CLOCK_DIV_BY_6 | DAC_ON, 0x8000);
while(TRUE){
DAC1RDAT = ++i;
}
} |
After configurating DAC1CON=0x9105 and DAC1STAT=0x01A2 (DAC enabled, it continues in idle mode, right channel & midpoint enable). After that, the output has a fixed voltage around 1.82V. When I write in DAC1RDAT the voltage doesn't change, in debug mode the DAC1RDAT register doesn't vary.
Another question, how I can use the interrupts of this DAC?
Thanks.
Regards. |
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treanla
Guest
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| Same problem on dspic33fj64gp802 |
| Posted: Mon Dec 28, 2009 8:49 am |
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There must be something we are missing.
Also the definition file (headerfile ) for 802 seems to lack any support for DAC interrupts. |
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bharath
Guest
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| ds PIC 33fj128GP802 |
| Posted: Sun Jan 10, 2010 9:26 am |
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hi im also getting same problem with this chip
is u r able to fine soultion
plz let me know
very urgent........... |
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treanla
Guest
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| 4.104 with DAinterrupts works |
| Posted: Mon Jan 11, 2010 2:18 am |
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With 4.104 we now have DA interrupts defined.
Then you can easily adopt the Microchip application sample found on their site DAC_SINEWAVE.ZIP. Its available as download when you go into the datasheet section of the 802 chip.
Just change the ISR defines to #INT_xxx for DAC and rename Microchips xxxbits.yyy to CCS style MCU_xxx.yyy and it will compile as is. |
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treanla
Guest
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| clarification |
| Posted: Mon Jan 11, 2010 2:19 am |
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Forgot to mention that the CCS DAC routines will not work here !
You must program the registers yourself and in the Microchip sample. |
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buchtsucht
Joined: 14 May 2010
Posts: 20
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| Timing |
| Posted: Thu Jun 03, 2010 12:53 am |
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I had exactly the same problem. After trying several settings everything is O.K.
The "intelligent" circuit inside the PIC, that smooths DAC ripple, seems to makes problems (shut down the DAC?), if you don´t feed the DAC at the right time. Correct settings of the aux. oscillator are important.
This should work (clock source = 10 MHz external clock):
| Code: |
#include <33FJ64GP802.h>
#FUSES NoWDT // Watch Dog Timer
#FUSES WPOSTS1
#FUSES NOPROTECT
#FUSES IESO //Internal External Switch Over mode enabled
#FUSES CKSFSM //Clock Switching is enbled
#FUSES PR_PLL //Primary Oscillator with PLL
#word DAC1STAT =0x03F2 // DAC left/rigth enable
#bit ROEN = DAC1STAT.7 // Right Channel DAC Output Enabled //
#bit RITYPE = DAC1STAT.2 // Right Channel Interrupt if FIFO is not Full //
#word DAC1CON =0x03F0 // DAC settings
#bit AMPON = DAC1CON.12 // Amplifier Disabled During Sleep and Idle Modes //
#bit FORM = DAC1CON.8 // Data Format is Unsigned //
#bit DACFDIV6 = DAC1CON.6 // Divide Clock
#bit DACFDIV5 = DAC1CON.5 // Divide Clock
#bit DACFDIV4 = DAC1CON.4 // Divide Clock
#bit DACFDIV3 = DAC1CON.3 // Divide Clock
#bit DACFDIV2 = DAC1CON.2 // Divide Clock
#bit DACFDIV1 = DAC1CON.1 // Divide Clock
#bit DACFDIV0 = DAC1CON.0 // Divide Clock
#word DAC1DFLT =0x03F4 // DACR Default Wert
#word DAC1LDAT =0x03F6 // DAC Value LEFT
#word DAC1RDAT =0x03F8 // DAC Value RIGHT
#word ACLKCON =0x074A // DAC Auxiliary Oscillator settings
#word IFS4 =0x008C // DAC Interrupt status register
#bit DAC1RIF = IFS4.15 // Clear Right Channel Interrupt Flag //
#bit DAC1RIE = IFS4.14 // Right Channel Interrupt Enabled //
#word CLKDIV=0x0744
#word PLLFBD=0x0746
#use FAST_IO (B)
#use delay(clock=41890000)
int a,b; long aa,bb,cc;
void Main(){
SETUP_WDT(WDT_OFF);
CLKDIV=0b0000000000011011;PLLFBD=0xF1; //41 Mhz PLL
//54L21098R6543210
ACLKCON =0b0000000010000000; // 14[0]=Fvco / [1]=AUX/10Mhz // 10..8 divider 000=256 // 7 [1]=10Mhz
DAC1STAT=0b1000000010000000;
DAC1CON =0b1001000000000011;
while(1){for(cc=0;cc<=65535;++cc) {cc=cc+256;while((bit_test(DAC1STAT,1))==1);dac1ldat=cc;}
}
}
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