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RAM Access Question

 
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daveh
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RAM Access Question
PostPosted: Wed Nov 25, 2009 2:57 pm     Reply with quote

Hello, I'm trying to follow the disassembly listing, I don't follow how "BANKED" works:

Code:
1117:              voltage=0.0;
  459E    6B15     CLRF 0x15, BANKED
  45A0    6B14     CLRF 0x14, BANKED
  45A2    6B13     CLRF 0x13, BANKED
  45A4    6B12     CLRF 0x12, BANKED
1118:                          voltage=(float)(signed int32)make32(data3,data2,data1,data0);
  45A6    C926     MOVFF 0x926, 0x3
  45AA    C925     MOVFF 0x925, 0x2
  45AE    C924     MOVFF 0x924, 0x1
  45B2    C923     MOVFF 0x923, 0
  45B6    C926     MOVFF 0x926, 0x92c
  45BA    C925     MOVFF 0x925, 0x92b
  45BE    C924     MOVFF 0x924, 0x92a
  45C2    C923     MOVFF 0x923, 0x929
  45C6    0100     MOVLB 0
  45C8    ECC3     CALL 0x2b86, 0
  45CC    C003     MOVFF 0x3, 0x915
  45D0    C002     MOVFF 0x2, 0x914
  45D4    C001     MOVFF 0x1, 0x913
  45D8    C000     MOVFF 0, 0x912


So is it accessing the same memory location when it saves 0.0 to voltage as when it saves the 4bytes converted?

Thanks
bkamen



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Posts: 1611
Location: Central Illinois, USA

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PostPosted: Wed Nov 25, 2009 6:23 pm     Reply with quote

The PIC 8bit line of micros are just that, 8bit micros.

Typically, they can only address up to 8bits of RAM at a time (256bytes).

To get around that, they have an extra register to add some additional space to the RAM Address counter.

Typically, for the 18F line, this is 4 more bits. This equals 4096bytes of RAM. However, there's some special modes of access to that, so the max RAM is actually less than that although the RAM space IS from 0x000-0xFFF

So with that, you have 0-F of RAM banks 0x00-0xFF.

You have to bank switch in and out between those banks.

CCS does this for you automatically. (although you can force it to do some things if you want -- kinda manually).

Anyway - it's bank switching.

Typically with bankswitched CPU's, there STILL needs to be some common accessed RAM somewhere.

In the PIC Datasheet, CLRF says:

Quote:
Syntax: CLRF f {,a}
Operands: 0 ≤ f ≤ 255
a ∈ [0,1]
Operation: 000h → f,
1 → Z
Status Affected: Z
Encoding: 0110 101a ffff ffff
Description: Clears the contents of the specified
register.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.


Does that help?

Which PIC are you using?

-Ben
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PCM programmer



Joined: 06 Sep 2003
Posts: 21708

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PostPosted: Thu Nov 26, 2009 2:21 am     Reply with quote

Another way to learn about it is to look at the memory map for the
PIC's data memory. For the 18F452, see this diagram in the data sheet:
Quote:

FIGURE 4-7: DATA MEMORY MAP FOR PIC18F252/452

Notice that there are two areas that are called "Access Ram". All of the
rest of the RAM is "Banked".

Next, let's make a test program to see how the compiler generates
ASM code, depending on the RAM bank in which the variable resides.
Create several variables, and #locate them at the start of each bank.
In the case of the first bank, the compiler won't let me put the variable
at address 0x00, because it reserves some RAM for its own use at the
start of RAM. That's why the I placed the first variable at 0x10.

Then compile the test program and look at the Program Memory window
in MPLAB. You will see the generated ASM code has "ACCESS" or
"BANKED" appended to the MOVWF instructions, depending upon the
address of the variable. This corresponds exactly to the memory map
in the PIC data sheet.

Notice that when the RAM is not in the special "ACCESS Ram" address
ranges, then a MOVLB instruction must be used to set the bank.
Code:

  0022    0E01     MOVLW 0x1
  0024    6E10     MOVWF 0x10, ACCESS

  0026    0E02     MOVLW 0x2
  0028    6E7F     MOVWF 0x7f, ACCESS

// Movlb is not used here because the Bank Select Register
// is already set to Bank 0 (upon power-on reset of the PIC).
  002A    0E03     MOVLW 0x3
  002C    6F80     MOVWF 0x80, BANKED

// Movlb is not used here because the Bank Select Register
// is already set to Bank 0 (upon power-on reset of the PIC).
  002E    0E04     MOVLW 0x4
  0030    6FFF     MOVWF 0xff, BANKED

  0032    0E05     MOVLW 0x5
  0034    0101     MOVLB 0x1   // Set Bank 1
  0036    6F00     MOVWF 0, BANKED  // Write to address 0x100

  0038    0E06     MOVLW 0x6
  003A    0102     MOVLB 0x2  // Set Bank 2
  003C    6F00     MOVWF 0, BANKED  // Write to address 0x200

  003E    0E07     MOVLW 0x7
  0040    0103     MOVLB 0x3   // Set Bank 3
  0042    6F00     MOVWF 0, BANKED   // Write to address 0x300

  0044    0E08     MOVLW 0x8
  0046    0104     MOVLB 0x4   // Set Bank 4
  0048    6F00     MOVWF 0, BANKED  // Write to address 0x400

  004A    0E09     MOVLW 0x9
  004C    0105     MOVLB 0x5   // Set Bank 5
  004E    6F00     MOVWF 0, BANKED  // Write to address 0x500

  0050    0E0A     MOVLW 0xa
  0052    6E80     MOVWF 0xf80, ACCESS

Test program:
Code:

#include <18F452.h>
#fuses XT,NOWDT,NOPROTECT,BROWNOUT,PUT,NOLVP
#use delay(clock=4000000) 

int8 addr_10;
int8 addr_80;
int8 addr_FF;
int8 addr_100;
int8 addr_200;
int8 addr_300;
int8 addr_400;
int8 addr_500;

#locate addr_10 = 0x10
#locate addr_80 = 0x80
#locate addr_100 = 0x100
#locate addr_200 = 0x200
#locate addr_300 = 0x300
#locate addr_400 = 0x400
#locate addr_500 = 0x500

#locate PortA = 0xF80   // SFR register

//==================================
void main()
{
addr_10   = 1;
addr_80  = 3;
addr_100 = 5;
addr_200 = 6;
addr_300 = 7;
addr_400 = 8;
addr_500 = 9;

PortA = 10;


while(1);
}
daveh
Guest







PostPosted: Mon Nov 30, 2009 9:02 am     Reply with quote

Thanks guys, I think I follow. I'm using the PIC1865J50.

So in my example I'd need to look up a little further to see what the bank value was set to in order to see which location the CLRF actually cleared by "6B15 - CLRF 0x15, BANKED".

From the data sheet I see that the MOVFF command is actually a two-part command, the first part 0b1100 ffff ffff ffff (0xCfff) indicates the source and then 0b1111 ffff ffff ffff (0xFfff) indicated the destination. From my sample disassembly line 45CC it shows C003 and from that it gets "MOVFF 0x3, 0x915"... where does it get the 0x95 from? Shouldn't there be a "F915"?
ckielstra



Joined: 18 Mar 2004
Posts: 3680
Location: The Netherlands

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PostPosted: Mon Nov 30, 2009 6:42 pm     Reply with quote

daveh wrote:
From my sample disassembly line 45CC it shows C003 and from that it gets "MOVFF 0x3, 0x915"... where does it get the 0x95 from? Shouldn't there be a "F915"?
Yes, you are right and this is an omission (some would call it a bug) in the CCS disassembly. If you look at the addresses you'll see it counts up by 4 for the MOVFF instruction, but only shows 'C003' which are two bytes.

Yes, it is wrong but only a minor error. Remember the CCS compiler is a C-compiler, if I'd want to program in assembly I would use an assembler. The symbolic code shown is correct and this is what I use the list file for. Rather than fixing this bug I have the CCS people solve serious compiler bugs.
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