Problem with dc-dc converter

[TheTwin]

Hi, I need a 21us PWM and a 60000Hz sampling adc frequency.
This is my code:

[Ttelmah]

You are not going to do it.
You don't tell us enough to really help (what PIC, what clock frequency etc.), but in general the sampling time of most PIC ADC's, is a minumum of about 26uSec, _with an acquisition time of several uSec as well_, giving maximum ADC rates in the order of 30KHz. The PWM, is probably possible, but your resolution will be below the maximum, since even at 48MHz, 21uSec will only be about 1000 clock cycles. Finally, the arithmetic you are using, uses floating point. Probably well over 100uSec for this alone....
Generally, you would not expect to update the PWM, on a 'per cycle' basis at this sort of speed. Re-design your maths using scaled integers, and run the update loop at a sub multiple of the PWM frequency. Aim for possibly 10KHz, and it might well be possible.

Best Wishes

[TheTwin]

Thanks for your reply...
I'm using a pic 18f4550 and this is the first part of my code:

[ckielstra]

I haven't looked into the timing issues, but your program has a few serious problems.
First of all, in C you have to write to code inside a function. You can't just write the lines and expect the processor to run them top to bottom. Just a simple main() wrapper would do for now:

[TheTwin]

so it should be correct.. is'n it?


#include <18F4550.h>
#device adc=8

#FUSES NOWDT //No Watch Dog Timer
#FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale
#FUSES HSPLL //High speed Osc (> 4mhz)
#FUSES NOPROTECT //Code not protected from reading
#FUSES NOBROWNOUT //No brownout reset
#FUSES NOPUT //No Power Up Timer
#FUSES NOCPD //No EE protection
#FUSES STVREN //Stack full/underflow will cause reset
#FUSES NODEBUG //No Debug mode for ICD
#FUSES NOLVP
#FUSES NOWRT //Program memory not write protected
#FUSES NOWRTD //Data EEPROM not write protected
#FUSES IESO //Internal External Switch Over mode enabled
#FUSES FCMEN //Fail-safe clock monitor enabled
#FUSES PBADEN //PORTB pins are configured as analog input channels on RESET
#FUSES NOWRTC //configuration not registers write protected
#FUSES NOWRTB //Boot block not write protected
#FUSES NOEBTR //Memory not protected from table reads
#FUSES NOEBTRB //Boot block not protected from table reads
#FUSES NOCPB //No Boot Block code protection
#FUSES LPT1OSC //Timer1 configured for low-power operation
#FUSES MCLR //Master Clear pin enabled
#FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode)

#use delay(clock=32000000)


#include <math.h>



void main()
{
int8 setpoint;
int8 vout;
float err=0,err1=0,err2=0;
float uk,uk1=0,uk2=0;
int8 duty;


setup_adc_ports(AN0_TO_AN1|VSS_VREF);
setup_adc(ADC_CLOCK_DIV_32);
setup_psp(PSP_DISABLED);
setup_spi(FALSE);
setup_wdt(WDT_OFF);
setup_timer_0(RTCC_INTERNAL);
setup_timer_1(T1_DISABLED);
setup_timer_2(T2_DIV_BY_1,255,1);
setup_timer_3(T3_DISABLED|T3_DIV_BY_1);
setup_comparator(NC_NC_NC_NC);
setup_vref(FALSE);
setup_oscillator(OSC_8MHZ|OSC_NORMAL|OSC_PLL_ON);
setup_ccp1(0xc);



set_tris_c(0x00);
set_adc_channel( 1 );
delay_us(10);
setpoint=read_adc();

set_adc_channel(0);
delay_us(10);


while(true){
output_toggle(PIN_B1);


vout=read_adc();

if(abs(setpoint)>=abs(vout))
err=(setpoint-vout);
else
err=-(vout-setpoint);

uk=(1.368*uk1)-(0.3679*uk2)+(0.8*err)-(1.423*err1)+(0.6373*err2);
duty=uk+128;
set_pwm1_duty(duty);
uk2=uk1;
uk1=uk;
err2=err1;
err1=err;


}



}

[TheTwin]

I didn't understand how to rise the oscillator freq. up to 48 Mhz with pll.

[TheTwin]

I tried to do in this way:

#FUSES HSPLL
#FUSES PLL5
#FUSES CPUDIV2
...
...
#use delay(clock=48000000)
...
void main()
{
...

setup_oscillator(OSC_20MHZ|OSC_NORMAL|OSC_PLL_ON);
...


Is it correct??

[Guest]

sorry, I made a mistake
I think it's correct now:

[Ttelmah]

Probably not....

Are you actually usng the internal oscillator, or an external crystal?. You have a 'mix' of setups, some of which apply to the former, and some the latter...

The 4550, does not support software control of the PLL (CCS, incorrectly have this in their header file - it is available on most internal oscillator modules, but _not_ on the USB enabled chips - the PLL, is not available with the internal oscillator on these). Compare the oscillator diagrams for the 4550 (Fig 2.1), with the one for (say) the 1330 (Fig 2.8). Note how on the later there is a PLL available between the internal oscillator, and the CPU clock input, which is not present on the 4550. Not how this is enabled by OSCTUNE bit 6. Note that on the 4550, this bit is shown as 'umimplemented'.
Basically your 'setup_oscillator' line won't work, it may not prevent the fuses from working, but is incorrect/dangerous. Control of the PLL, on the 4550, is _entirely_ through the fuses. The fuses you show, give a CPU operating at 32MHz, for an external crystal at 16MHz. Is this what you want?....

Best Wishes

[Guest]

I would like to have a CPU at 48MHz and internal oscillator... Is it possible? If not, which is the max freq. that I can have with the internal oscillator?
But above all, might I know the correct fuses and setup to do? Thanks.

[Ttelmah]

Not possible.
Maximum frequency from the internal oscillator on the 4550, is 8Mhz.
If you are using USB, then you _must_ use an external oscillator. The accuracy of the internal oscillator is not good enough for USB, which is why the internal oscillator does not connect to the USB circuitry
If you don't want USB, then use another chip. There are several similar chips, that give you back the pins used for USB, and then have higher frequencies from the internal oscillator.
The 18F45J50 gives 48Mhz from the internal oscillator, _but you can't use USB, unless you add an external oscillator_.

Best Wishes