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ADC and choosing the right clock, e.g. ADC_CLOCK_INTERNAL

 
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evsource



Joined: 21 Nov 2006
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ADC and choosing the right clock, e.g. ADC_CLOCK_INTERNAL
PostPosted: Wed Sep 23, 2009 4:40 pm     Reply with quote

Hi,

I really did look around the forum for this answer. I didn't seem to find any concise explanations. This one did answer some questions: https://www.ccsinfo.com/forum/viewtopic.php?p=54621

Ttelmah said in one post that using ADC_CLOCK_INTERNAL doesn't produce the greatest results. I've always used that, but if there's a reason to use something like ADC_CLOCK_DIV_16, then I'd like to understand why.

I do understand that ADC_CLOCK_INTERNAL uses a clock that the ADC has built in (RC), and that it can be used to take AD readings while the chip is asleep. But what would dictate choosing, say, ADC_CLOCK_DIV_16 vs ADC_CLOCK_DIV_2?

What reasons other than needing to read while asleep would there be for not using the chip's clock?

Finally, what are the values like these used for: ADC_TAD_MUL_4, etc.?
Guest








PostPosted: Wed Sep 23, 2009 7:14 pm     Reply with quote

Read then data sheet for YOUR pic.

Usually there is a TABLE of master clock vs optimum divisor for ADC operation.

Pick the fastest one that does not go beyond the recommendation.

Pretty EZ if you read the specs.

That's how I select it.
Ttelmah
Guest







PostPosted: Thu Sep 24, 2009 2:53 am     Reply with quote

On the ADC_CLOCK_INTERNAL, again it is in the data sheet. The 'problem' is that when you select the internal clock, it is asynchronous to the chips own clock, so you will get a 'beating' effect of noise from the chips other operations. This is why you will find under the clock frequency selection table, a 'note', usually reading something like:
"When the device frequencies are greater than 1 MHz, the RC A/D conversion clock source is only recommended for SLEEP operation."

Basically, at low frequencies, the clock is faster than the instruction cycle, so there isn't much of a problem. However as the clock gets faster, accuracy _will_ be degraded, so you have two choices:

1) Use the Fosc/N clocks (fastest one selected as outlined by the previous poster), which are then synchronous to the processor's instruction clock.
2) Put the processor to sleep for the conversion - this is the 'best' solution for accuracy, since it reduces noise significantly.

The code needed, is something like:
Code:


disable_interrupts(GLOBAL);
//You also need to disable any interrupts in use here.
enable_interrupts(INT_ADC);
clear_interrupts(INT_ADC); //ensure interrupt is clear
read_adc(ADC_START_ONLY); //trigger the ADC conversion
sleep(); //Processor will sleep until INT_ADC triggers
delay_cycles(1); NOP instruction
val=read_ADC(ADC_READ_ONLY); //get the ADC result
disable_interrupts(INT_ADC);
//Now re-enable any other interrupts in use, and the global flag if required



Best Wishes
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