external interrupt speed

[aruna1]

Guys, if I have 12f675 with external 20MHz crystal oscillator what is the maximum external interrupt speed it can have? (within safe margins, without losing any interrupts).
Is there any theory or equation to calculate this so I can calculate speed for other pics?
And does this speed depend on programming language or compiler? (I use CCS C 4.084)

[PCM programmer]

See the description of the CCS interrupt handler code in this thread:
http://www.ccsinfo.com/forum/viewtopic.php?t=29173

Print the ASM code for the interrupt handler from the .LST file for your
version of the compiler. Write the number of instruction cycles next to
each instruction. Most instructions are one instruction cycle. Instructions
that execute a jump take 2 instruction cycles (if they do the jump).

You have to count the interrupt handler code that both enters and exits
from the interrupt. You also have to count the user code in your isr
routine.

Let's say that it takes 60 instruction cycles. At 20 MHz, you have 5
instruction cycles per microsecond. So the time is 60/5 = 12 us.

There is also a short amount of time necessary for the PIC hardware
to recognize and execute the interrupt (3 to 4 instruction cycles).

So if it takes 13 us, that gives a maximum interrupt rate of about 77 KHz.
But if you run interrupts at near that rate, your code in main() will have
a very small duty cycle. Most of the time will be spent in the interrupt
handler, just saving and restoring the context. Do you want to do that ?

[aruna1]

thanks