ENC28J60 in CCS' modified TCP/IP stack

javick82 · Joined: 12 Jul 2007 Posts: 43

Does the software controlling the ENC28J60 in CCS' modified TCP/IP stack enable/disable the chip as it needs to be used? I am using the SPI for the ethernet as well as the EEPROM it will be storing data to. Limitied testing seems to support the claim that the chip enable/select pin is controlled "on demand" so when I am not running ethernet the SPI is free.

Does anyone know for sure?

PCM programmer · Joined: 06 Sep 2003 Posts: 21708

If you have a question about the code in a specific file, post the name
of the file (or files).

javick82 · Joined: 12 Jul 2007 Posts: 43

See the MAC/NIC settings in the hardware.h file. I guess the other files would be mac.c and tcp.c.

Upon completion of a task using the ethernet, does the ENC28J60 chip go disabled?

It is really a general question pertaining to the overall operation of the entire modified TCP/IP stack.

andrewg · Posted: Fri Aug 28, 2009 4:42 am

@javick82: CCS's ENC28J60 support code only selects the chip when it's used. Your code is free to do whatever it likes with the SPI bus whenever the stack isn't being used. Importantly, the TCP/IP is polled, not interrupt driven, so there's no issues with the stack interfering with your code. Just make sure none of your interrupts use the SPI bus either.

@theshyboys: The support code is available for download from the CCS support web site. Make sure your maintenance is paid up!
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Andrew

asmallri · Joined: 12 Aug 2004 Posts: 1634 Location: Perth, Australia