View previous topic :: View next topic |
Author |
Message |
marcusayoung
Joined: 03 Jun 2009 Posts: 28
|
PIC GPIO inverter |
Posted: Thu Aug 06, 2009 4:21 pm |
|
|
I'm using a 12F683 to generate a PWM. Is it possible with this one CCP module to generate a complimentary output of the PWM signal on another GPIO (other than the one used to generate the PWM on GPIO2 of course)?
If not, is it possible to use two extra GPIO pins to realize an inverter? That is, tie the PWM to say GPIO3 (inverter in) and out of say GPIO1 (inverter out).
PCB space is EXTREMELY tight and i'm just entertaining the option even though there are many single inverter IC's in different small package options. |
|
|
PCM programmer
Joined: 06 Sep 2003 Posts: 21708
|
|
|
marcusayoung
Joined: 03 Jun 2009 Posts: 28
|
|
Posted: Fri Aug 07, 2009 7:09 am |
|
|
Right, this is what i said above. But is this possible to realize with a PIC and extra GPIO?
Thanks |
|
|
Ttelmah Guest
|
|
Posted: Fri Aug 07, 2009 9:13 am |
|
|
Not really.
There is no hardware ability to do this. You could program software to invert a signal onto an output, but the delays would probably be unacceptable, and your processor couldn't do anything else while this was going on...
What is the clock frequency of the chip?. What is the PWM frequency. One thing that can be done, but uses a lot of code time, is to not use the PWM function, but use the CCP interrupts instead. For low speeds, you program a CCP interrupt after a count corresponding to the 'off' time, when this triggers, set the output pin, and program the interrupt to occur after the required 'on' time. Then clear the pin, and restart the process. For PWM's with several thousand rocessor clock cycles beween the edges, this will work fine, and you can elect to set or clear multiple pins...
Best Wishes |
|
|
bkamen
Joined: 07 Jan 2004 Posts: 1615 Location: Central Illinois, USA
|
|
Posted: Fri Aug 07, 2009 10:03 am |
|
|
Unfortunately space is a problem -- otherwise they make PIC's with complementary PWM outputs.
What's the tolerance of the timing between hi-low? What kind of drive current do you need?
PCM's suggestion above is a good one. I recently used a dual gate buffer in a SOT-23-6 package... that came in SC-70 and bump-chip packaging. Check the TI family out.
Fun Stuff..
-Ben _________________ Dazed and confused? I don't think so. Just "plain lost" will do. :D |
|
|
marcusayoung
Joined: 03 Jun 2009 Posts: 28
|
|
Posted: Fri Aug 07, 2009 1:32 pm |
|
|
The clock frequency is 8MHz. PWM varies between 9kHz - 100kHz.
I definitely want the compliment output to scale very close to the original, so i would rate the tolerance at +/- 5%.
I think the code involved with doing this inversion is too much, not really worth it.
My company carries lots of different single inverters (SOT-23, SC-70, etc), so I think this is best solved in hardware.
I was just curious is all, oh well.
Thanks |
|
|
Ttelmah Guest
|
|
Posted: Fri Aug 07, 2009 2:48 pm |
|
|
At those frequencies, it can _only_ be solved in hardware.
Best Wishes |
|
|
mbradley
Joined: 11 Jul 2009 Posts: 118 Location: California, USA
|
|
Posted: Tue Sep 01, 2009 8:19 pm |
|
|
There is a pic (or two) that have this functionality built into the hardware, its for motor control.
I think its the 18F2431, 6 pwm outputs, but 3 are compliments of the other 3 |
|
|
bkamen
Joined: 07 Jan 2004 Posts: 1615 Location: Central Illinois, USA
|
|
Posted: Tue Sep 01, 2009 9:28 pm |
|
|
mbradley wrote: | There is a pic (or two) that have this functionality built into the hardware, its for motor control.
I think its the 18F2431, 6 pwm outputs, but 3 are compliments of the other 3 |
Yes.. and it's actually more than that I think.
I used the 18F4431 in a project but more for the dual sample and hold units on the ADC.
Not a lot of memory space though.
-Ben _________________ Dazed and confused? I don't think so. Just "plain lost" will do. :D |
|
|
|