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Timer2 runs at 960kHz, but should be 4MHz.

 
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kaz



Joined: 15 May 2009
Posts: 12

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Timer2 runs at 960kHz, but should be 4MHz.
PostPosted: Fri May 15, 2009 11:53 am     Reply with quote

Hardware: PIC16F886, PIC16F690
Compiler version 4.005
Intention: To have timer2 interrupt every 10 milliseconds.

I'm working on a periodic interrupt that eventually scales into measuring minutes, and accuracy is a priority. I'm not quite clear on the math behind the timer interrupts, and find that my current setup produces the wrong results. I believe I'm using the internal oscillator, and setting it for 4MHz.

The Math I'm not clear on
CCS C Compiler Manual wrote:
setup_timer_2 ( T2_DIV_BY_4, 0xc0, 2);
// At 20mhz, the timer will increment every 800ns,
// will overflow every 154.4us,
// and will interrupt every 308.8us.

T2_DIV_BY_4: Does this mean that the clock is scaled to 5MHz, or to 1.25MHz?
The other two parameters I understand fine.

The setup that's confusing me

I've tried to include all the relevant pieces of code. The behavior is the same between two different programs on two different chips. The timer2 setup is in common between the both of them though.

Code:

#include <16F886.h>
#fuses DEBUG,INTRC_IO,NOWDT,BOR2V,NOFCMEN,NOIESO,MCLR
#device ADC=10 *=16
#use delay(internal=4M)   // compiler will insert setup_oscillator(4MHZ) automatically
#use fast_io(A)

#define SCAN0      PIN_A2

#int_timer2
void timer2_isr()
{   static BOOLEAN blinky;

   OUTPUT_HIGH(LED1);

   if(blinky)   OUTPUT_HIGH(SCAN0);
   else      OUTPUT_LOW(SCAN0);
   blinky ^= TRUE;

   
   return;
}

void main(void)
{
   enable_interrupts(INT_TIMER2);
   setup_timer_2 (T2_DIV_BY_16, 125, 5);
   set_timer2 (0);

   while(1);
}



Attaching an oscilloscope to the pin, I get a symmetric (as far as I can tell) square-wave, that lasts for 10.4 ms. And the values for setup_timer_2 are also from my misunderstanding. If I do the math backwards (on both chips with different periods) I find that the clock is running at some 960KHz. Redoing the values with that in mind gives me excellent results, but I'd enjoy understanding the problem, not the fix.
FvM



Joined: 27 Aug 2008
Posts: 2337
Location: Germany

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PostPosted: Fri May 15, 2009 12:17 pm     Reply with quote

The PIC15F886 datasheet can clarify your doubts. In the timer2 block diagram, you see, that the system clock is divided by 4, before the specified divider is applied. 960 kHz is slightly below the expectable +/- 2% range of Fosc/4 however, but not a compiler problem.

A period of 125 divides by 126, BTW. So the clock frequency deviation would be -3%, if 10.4 ms are an exact measurement.
kaz



Joined: 15 May 2009
Posts: 12

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PostPosted: Fri May 15, 2009 12:34 pm     Reply with quote

FvM wrote:
The PIC15F886 datasheet can clarify your doubts. In the timer2 block diagram, you see, that the system clock is divided by 4, before the specified divider is applied. 960 kHz is slightly below the expectable +/- 2% range of Fosc/4 however, but not a compiler problem.

A period of 125 divides by 126, BTW. So the clock frequency deviation would be -3%, if 10.4 ms are an exact measurement.


Very Happy This answers all of my questions perfectly. Thank you!
Ttelmah
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PostPosted: Fri May 15, 2009 3:06 pm     Reply with quote

However though this works as expected, look at the comments at the head of the forum, before trying to write anything more complex. 4.005, is _appalling_, and will give you problems if you try to go much further...

Best Wishes
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