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ntgcp_08
Joined: 21 Feb 2008
Posts: 24
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| Counter on Timer1 never counts 1st pulse |
 Posted: Mon Apr 27, 2009 1:54 pm |
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PIC = 18F67J50
Supply Voltage = 3.0V
Compiler Version = PCH V4.092
All I am trying to do is count pulses on pin C0. Everything works except I never count the first pulse. Everytime I reset the timer, it does not count the very next input pulse. Does anyone know why?
| Code: |
#include <18F67J50.h>
#device adc=10
#FUSES H4_SW //High speed osc with SW enabled 4x PLL
#FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode)
#FUSES NOWDT //No Watch Dog Timer
#FUSES NOSTVREN //Stack full/underflow will cause reset
#FUSES NOFCMEN //Fail-safe clock monitor enabled
#FUSES NOIESO //Internal External Switch Over mode enabled
#FUSES NOPROTECT //Code not protected from reading
#FUSES NODEBUG //No Debug mode for ICD
#FUSES PLL3 //No PLL PreScaler
#FUSES NOCPUDIV
#use delay(clock=48000000)//, RESTART_WDT)
#use fast_io(A)
#use fast_io(B)
#use fast_io(C)
#use fast_io(D)
#use fast_io(E)
#use fast_io(F)
#use fast_io(G)
#use rs232(baud=9600,parity=N,xmit=PIN_G1,rcv=PIN_G2,bits=8,STREAM=DEBUG,errors)
#define LED1 PIN_E4 // output 0
#define XMIT_PWR_ON PIN_E5 // output 0
#byte OSCTUNE = 0xf9b
#bit PLL_EN = OSCTUNE.6
#byte WDTCON = 0xfc0
#bit REGSLP = WDTCON.7
int counter_overflow;
// COUNTER OVERFLOW interrupt
#int_TIMER1
void TIMER1_isr(void) //TIMER1 counter increments on every rising edge
{
counter_overflow++;
}
void main()
{
short LOOP_FOREVER;
int16 counterValue=0;
int16 previousCounterValue=0;
LOOP_FOREVER = TRUE; //eliminates condition always TRUE warning
port_d_pullups(TRUE);
port_e_pullups(TRUE);
setup_adc_ports(sAN0|sAN1|sAN4|VSS_VREF);
setup_adc(ADC_CLOCK_INTERNAL|ADC_TAD_MUL_0);
setup_psp(PSP_DISABLED);
setup_spi(SPI_SS_DISABLED);
setup_spi2(SPI_SS_DISABLED);
setup_wdt(WDT_OFF);
setup_timer_0(RTCC_INTERNAL|RTCC_DIV_64); // 349mS /tick
setup_timer_1(T1_EXTERNAL| T1_DIV_BY_1);
setup_timer_2(T2_DIV_BY_16,251,15); //LED TIMER, 5mS... blinks every two seconds
setup_timer_3(T3_INTERNAL|T3_DIV_BY_1);
setup_timer_4(T4_DIV_BY_16,250,15); //5.01 mS timer
setup_comparator(NC_NC_NC_NC);
setup_vref(FALSE);
SET_TRIS_A(0x2F);
SET_TRIS_B(0xFF);
SET_TRIS_C(0x91);
SET_TRIS_D(0xFF);
SET_TRIS_E(0x00);
SET_TRIS_F(0x04);
SET_TRIS_G(0x0C);
REGSLP = 1; //when device goes into sleep mode, on-chip regulator automatically disables itself
PLL_EN = 1; //enable the software PLL
delay_ms(250); // delay for software PLL
output_bit(XMIT_PWR_ON,1);
output_bit(LED1,1);
enable_interrupts(GLOBAL);
enable_interrupts(INT_TIMER1);
counter_overflow=0;
while(LOOP_FOREVER)
{
counterValue=get_timer1();
if(counterValue != previousCounterValue){
fprintf(DEBUG, "CounterOverflow=%u, counterValue=%lu\r\n", counter_overflow, counterValue);
previousCounterValue=counterValue;
}
if(!input(PIN_B1)){
set_timer1(0);
counter_overflow=0;
}
}
}
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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ntgcp_08
Joined: 21 Feb 2008
Posts: 24
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| Posted: Tue Apr 28, 2009 10:00 am |
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I read the errata document. In my application the user will clear the timer (reset it to zero). The external clock pulse will always be low when the timer is reset. So I need to follow the second method outlined in the errata.
"If Timer 1 updates can not be reliably completed before the clock pulse falling edge occurs: 1. Wait for TMR1L to increment. 2. When an increment is detected, immediately update TMR1H and TMR1L as needed."
It says to include the code between RTCisr and Update.
From the Hex code example, how do I modify the HighISR and RTCisr using the CCS compiler? |
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